资源列表
checksum_master_onchip2.7z
- 学习sopc builder当中自定制元件的最经典最全面的例子，绝对超值-Learning sopc builder customized component among the most classic examples of the most comprehensive, the absolute value
timeclock
- 基于FPGA实现的简单的时钟，只具有时钟的基本功能。-FPGA-based realization of the simple clock, only the basic functions of the clock.
all
- 利用VHDL程式達到上數9999 並且有遮沒+防彈跳功能，是個很好又實際的程式。-Reached on the use of VHDL program and the number of 9999 did not cover+ anti-bounce function is a very good and practical programs.
mentor.tar
- high speed counter that is designed to work at 150MHz.
fifo_test.v.tar
- code for implementing high speed fifo for apturing data from fpga-code for for implementing high speed fifo for apturing data from fpga
WritteninVHDLmousedriver
- 花了好长一段时间用VHDL写的鼠标驱动器 -Written in VHDL mouse driver. Doc
PCI32shejicankao
- 32位PCI设计参考，包含PCI核网表、设计参考等-32-bit PCI reference design, including the nuclear PCI netlist, design reference
music
- 是用VHDL语言编写的乐曲演奏程序，详细的写了各个模块的子程序-VHDL language is the music playing program
wave_gen_timing
- Clock generation in VHDL
reset_gen
- reset generation to avoid asynch reset
clk_div
- Clock devider in VHDL code
char_fifo
- character FIFO in VHDL very speed