资源列表
基于VHDL的UART控制器设计
- UART模块的VHDL语言设计(Design of VHDL language based on UART module)
RS_encode_and_decode
- 文章详细描述了关于RS码的编码和解码全过程，讲解从浅入深，值得学习参考-The file describe the RS code and decode, there are a lot of examples in it, so you can understand it easily
DFFquartus
- D触发器 quartus实现 有RTL图-D flip-flop to achieve a RTL Figure quartus
CC
- quartus 的一个实例,希望对刚刚学习quartus 的人有点帮助
ISE0108
- xilinx ise 使用简明手册 vhdl fpga -xilinx ise
bch_dec_enc_dcd_latest.tar
- BCH译码器设计源代码，它能实现对两位错误的纠正。这是最新版本。-The BCH decoder design source code, it can achieve the two error correction. This is the latest version.
pcf8563
- pcf8563，在quartusII下VERILOG编写的数字时钟程序，8位数码管显示-pcf8563, written in quartusII VERILOG digital clock program, eight digital display
vhdlCyc3.0
- 完整可用的VHDL编写健身自行车控制系统的复杂状态机系统，使用ISE编写，在spartan6上实测通过-Complete exercise bikes available in VHDL state machine control system complexity system using ISE written by the spartan6 Found
h264.tar
- h.264 bluespec system verilog source code
Spartan-3ADSPs
- The objective of the labs today is to give you a basic understanding of FPGA design and enough experience to begin your own FPGA design with the ISE 10.1 tools and the Xilinx Spartan-3A DSP 1800A Starter Kit.-The objective of the labs today is
elevator.rar
- verilog语言写的一个四层电梯程序，有优先级的判断。,verilog language of a four-story elevator procedures to determine priority.
PS2
- 用verilog做的PS2键盘接口程序，对verilog学习有很大帮助-Verilog to do with the PS2 keyboard interface program, very helpful on learning verilog