资源列表
CIC_DEC_6
- CIC抽取滤波器设计，CIC滤波器采用5阶6倍抽取。-CIC decimation filter design, CIC filter stage 6 times 5 samples.
CIC_DEC_4
- CIC抽取滤波器设计，CIC滤波器采用5阶4倍抽取。-CIC decimation filter design, CIC filter order 4 times using 5 samples.
CIC_DEC_3
- CIC抽取滤波器设计，CIC滤波器采用5阶3倍抽取。-CIC decimation filter design, CIC filter order 3 times 5 samples.
vga
- eda vhdl vhdl -eda
led
- 51单片机与FPGA led闪烁程序-51 single-chip FPGA led blinking and procedures. . . . . . . . . . . . .
1602_jp
- FPGA lcd显示程序，可以扫描键盘输入，并在lcd上显示，-FPGA lcd display program, you can scan the keyboard input and display in lcd,
fb
- 占空比为1：1 的方波verilog程序，通过修改counter可以改变频率及占空比-1:1 duty cycle square wave of verilog procedures, counter can be changed by modifying the frequency and duty cycle
CombiningModuleSelection-ResourceSharingsynthesis
- combining module selection and resource sharing for vhdl and verilog designs
Quartus
- 这是一个教你熟练使用Quartus 软件的过程 希望可以对大家有用 -This is a Quartus skilled in the use of the software you can hope to all useful process
sdfdf
- 设计并制作一台数字显示的简易频率计。 （二）要求 1.基本要求 (1)频率测量 a.测量范围 信号：方波、正弦波 幅度：0.5V～5V[注] 频率：1Hz～1MHz b.测试误差≤0.1 (2)周期测量 a.测量范围 信号：方波、正弦波 幅度：0.5V～5V[注] 频率：1Hz～1MHz b.测试误差≤0.1 键盘从上到下，从左到有依次为： 1 2 3 4 5 6 7 8 9 0 .
quartus2_user_guide
- QuartusII最完整版使用指南，适合每位开发者-The most complete version of QuartusII guide for every developer
stack.vhd
- stack for the protocol used to implement into FPGA