资源列表
soure
- 用VHDL开发NES程序。这里是其配套的详细的VHDL语言源码。可用quartus进行验证。-NES with the VHDL development process. Here is the complete source of detailed VHDL language. Quartus available for verification.
SPWM
- VHDL采用自然采样法写的SPWM，里面有正弦表，可以通过外接输入正弦波和三角波的频率。 -VHDL using written natural sampling SPWM, there are sine table, you can enter through the external sinusoidal and triangular wave frequency.
DE2_CCD_sobel
- 通过摄像头图像的提取，在FPGA开发板上实现的，主要实现了图像轮廓的提取-Extraction of the image through the camera, in the FPGA implementation of the development board, the main achievement of the image contour extraction
lcd1602
- 通过FPGA实现对1602液晶的控制，注释详细，适合初学者练习使用状态机进行时序控制-1602 through the FPGA to realize the liquid crystal control, annotation detail, suitable for beginners to practice using the state machine for timing control
Camera_Interface_Verilog
- 该源代码包是基于片上系统的摄像头接口的Verilog语言程序，它包括以下5部分：RTL源代码，测试平台，软件仿真C代码，FPGA综合时的sdc和ucf文件，说明文档。-This source code package is the camera interface module based on the SoC use Verilog language. It has the following 5 parts: RTL code, testbench, software simulating
DE2_TV_New_v1
- build a tv box on fpga cyclone 2
codeFPGA
- source code verilog for get image 320x240 rgb form pc and display it on vga monitor
xlx_s6_lx150t_dev-sch-revc032510
- avnet Spartan-6开发板原理图-avnet Spartan-6 development board schematics
Spartan6
- spartan6 FPGA芯片的电路设计 Orcad原程序 公司内部文件 请下载的注意 仅供学习，不要用于商业 -the design of Spartan6 FPGA circuit. it is biult in Orcad.
quartusfft
- 文章讲述了quartus中ip核使用，主要是关于fft ip核的使用-the use of ip core in qquartus
vga_game
- 用Verilog写的小游戏，俄罗斯方块,在VGA上实现游戏功能-Verilog game
AD9516
- 在雷达模拟系统中实现AD9516定时程序-AD9516