资源列表
interrupt_controller
- 中断控制器电路verilog实现源代码,silicon验证的.-interrupt controller IP source code, APB interface.
DWC_mctl_ddr_fifo
- ASIC设计中各种同步异步的FIFO实现的verilog source code, 参数可配置 -almost all kinds of FIFO with verilog source code, parametes configuration
nnpid
- 通过神经网络实现的PID算法，整个工程文件，调试通过。-By PID algorithm neural networks, the entire project files, debugging through.
I2C
- FPGA I2C verilog代码，代码有注释。-FPGA I2C slave verilog code,with code remark.
PWM
- 使用FPGA/CPLD 输出固定占空比PWM波形。-using FPGA/CPLD output PWM waveform
shift-register
- FPGA/CPLD 的verilog移位寄存器代码。-verilog shift register code.
Uart
- FPGA verilog UART串口通信,可通过RS232串口与串口助手通信。-FPGA verilog UART communication, it could connect with UART assistor with RS232 port.
xiangduidingxiang
- 相对形象的程序，解决摄影测量的计算问题，很方便的程序-Relative to the image of the program, to solve computational problems photogrammetry
Fpga-fuzzy-pid-control
- 基于fpga的模糊pid控制的文章，希望能有帮助-Fpga based articles fuzzy pid control, hoping to help
vga8
- 利用FPGA设计VGA控制器，实现彩框显示 -Use FPGA design VGA controller, realize the color box display
shizhong
- 一个简单的时钟程序，适合刚接触FPGA的菜鸟，真的是很简单的东西-time clock
myuart
- 实现用FPGA实现UART串口功能，默认波特率为9600，包括发送模块接收模块和时钟模块-module uart，9600 bauds