资源列表
fsm
- 有限状态机工作原理、设计方法、步骤等精要说明-Finite state machine working principle, design method, such as Essentials of steps to explain
spi_controller
- SPI控制器，基于VERILOG描述，分模块设计，共6个模块，时钟产生模块，移位模块，主模块，从模块，定义模块，顶层模块。-SPI controller, based on the VERILOG descr iption, sub-module design, a total of six modules, clock generation module, shift module, main module, from the modules, custom module, top modul
fpga-tft
- fpga驱动tft lcd彩屏，实现显示功能-The fpga drive tft lcd color display, the display
pwm
- 在Quartus 9.0 下实现的PWM IP核设计，周期占空比均可调。-PWM IP core design,which period and duty is adjustable.
Verilog_SOM
- 神经自适应算法的Verilog 实现,Som-Verilog, SOM
JPEG
- 本文首先介绍了静态图像压缩（JPEG）编码算法的基本原理、压缩的实现过程及其重要过程的离散余弦变换（DCT）算法的实现原理及软件实现的例程，其次着重介绍了压缩过程中的DCT、量化和编码三个重要步骤的实现原理。-This paper describes the static image compression (JPEG) coding algorithm is the basic principle of compression process of the implementation pro
AD9851
- 用verilog编写的AD9851的驱动程序-the program use to drive AD9851 which wirte with verilog！
Alterafpga_jtag
- Altera FPAG USB jtag下载线制作资料,对制作及学习很有用-Altera FPAG USB jtag download cable production data, production and learning useful
SII9135
- SII9135 功能介绍文档。用于接收，进行解码使用-SII9135 Features document. For receiving, decoding using
High-Voltage-Generator
- 基于UC3845的高压发生电路，将12V转化为400V的高压模块。-This source can used to design a high-voltage supply by used the chip of UC3845.
merger_6sam_2io_ad_sync_nft3
- 电子式合并单元中，FPGA程序，fpga的型号为xc3s1-Electronic merged unit, FPGA program, fpga s model xc3s1000
BmpToMif
- 通过vhdl定制rom完成的彩灯点亮 -Custom rom vhdl completed by lantern light