搜索资源列表
OFDM
- OFDM系统仿真程序,包括信号产生,信号调制QPSK,串/并转换,ifft/fft变换-OFDM system simulation program, including the signal generation, signal modulation of QPSK, serial/parallel conversion, ifft/fft transform
MonitorB
- 用VHDL写的一个信息监视系统,包括对信息的整形、串并转换和奇偶校验等 还有状态的判断,信息格式的判断等 一个监视器-VHDL write a monitoring system, including the shaping of information, serial-to-parallel conversion and parity status judgment, the judgment of the information format monitor
para_serial
- 利用Verilog语言实现串并转换和并串转换,方便CPU和单片机之间通信 -Verilog to implement a serial-to-parallel conversion and parallel-to-serial conversion, to facilitate communication between the CPU and the microcontroller
vhdl
- 用VHDL语言设计一个串并转换电路。输入1位数据,输出8位数据。 验证:串行输入0、1、1、0、1、0、1、0,使结果输出为01101010 -A serial-to-parallel conversion circuit using VHDL design. Enter a data output 8-bit data. Verification: the serial input 0,1,1,0,1,0,1,0, the results output to 01101010
multiplex
- 四路信息时分复用和解复用,包含串并转换,并串转换,提取帧同步,分频,移位寄存器。-Quad information time-division multiplexing and demultiplexing, contains the string conversion, parallel-serial conversion, extracting the frame synchronization, frequency division, the shift register.
74hc164
- 基于proteus串并转换74hc164应用实例,附有详细程序及电路图-Based on the proteus string and convert 74hc164 application examples, with detailed procedures and schematics
8-serial-parallel-conversion
- 用verilog硬件描述语言实现的8位串并转换-8 serial-parallel conversion
chuanbingzhuanhuan
- Verilog串并转换,任意阶均可实现。-Verilog serial-to-parallel conversion of any order can be realized.
deserialize-VHDL
- VHDL写的串并转换代码,经ISE13.3测试能用的。-VHDL to write a serial-to-parallel conversion code, can be used the ISE13.3 test.
DFT_S_OFDM_lyl
- LTE上行链路使用的DFT-S-OFDM系统的仿真,其中包括QPSK星座映射、串并转换、N点DFT、子载波映射等。-LTE uplink using the DFT-S-OFDM system simulation, including QPSK constellation mapping, string and conversion, N-point DFT, subcarrier mapping, etc..
ofdm_lyl
- OFDM系统,包含QPSK星座映射、串并转换、IFFT变换、加保护间隔、求峰均比等。-OFDM system with QPSK constellation mapping, a serial-to-parallel conversion, IFFT transform, plus guard interval requirements such as peak-to-average ratio.
Ser2Par
- 二进制序列的串并转换 用于OFDM通信系统的编码部分的调制-A serial-to-parallel conversion
chuanbingzhuanhuan
- 串并转换,在图像处理中用于采集块像素,可以实现3*3的采集-Serial-parallel conversion, the acquisition block of pixels used in image processing, can achieve a collection of 3* 3
ser_to_4per
- 实现了数据的串并转换,由串码转换为4位并行码,代码用Verilog编写,并经过了Quartus的仿真-Data string and conversion, by the string of code is converted to 4-bit parallel code, the code in Verilog, and after the Quartus simulation
chuankoushoufa
- 接收代码: 对接收数据的采样频率:16X9600HZ 接收代码编写思路: 首先判断起始位,没有数据传输时,起始位为“1”的状态,当有数据时起始位为“0”。因为采样的频率是通信频率的16倍,所以当连续8次(数据位正中间)采集为“0”时就认为是有数据到来。那么可以开始采集数据位,以后每隔16个脉冲采集一个数据(每个数据的正中央,不易发生畸变的部分),连续采样8次,即完成数据位的采集。最后实现串并转换。如此重复即可。(因为通信已经预约好,停止位和校验位都为“1”,不会对数据产生影响。)
ser
- FPGA的串并转换器。包括Verilog源码和时序仿真波形。-FPGA serial-parallel converter. Including the Verilog source code and simulation waveform.
digital-flow-water-lights
- 本实验中共接入了8个共阳八段数码管(数码管阳极连在一起),演示数码管中的某一段点亮只需在对应的位置写入“0”即可。在这里74HC595实现了数据串并转换的功能,试验中用到的两片74HC595分别用于控制八个数码管的位选和其中每 个数码管的段选。-The experimental access the 8 Common Yang eight digital tube (digital tube anode together), a certain period in the demo dig
ofdm
- 分别就正交频分复用OFDM的串并转换、编码、ifft变换、插入循环前缀和后缀、加窗及逆变换等进行仿真分析。-Respectively orthogonal frequency division multiplexing (OFDM) and the string conversion, encoding, ifft transform, cyclic prefix and suffix insertion, the inverse transform, windowed and simulati
OFDM--ber
- ofdm仿真 其中包括qpsk调制解调,加高斯,串并转换等;最后有误码率曲线的输出-ofdm simulation including qpsk modulation and demodulation, plus Gaussian, string and conversion Finally there is an output bit error rate curve
msp430f149
- msp430f149单片机,实现串并转换,以及实现点亮二维矩阵的LED发光二极管.-msp430f149 c language