资源列表
sim
- 调试bcm5396，写入和读取内部寄存器功能。功能验证可以用(Debug bcm5396, write and read the internal register function. Functional validation can be used)
lab1
- 在vivado上测试通过的fpga流水灯(Test the passing FPGA flow lamp on vivado)
hamming_fsk
- 基于汉明编码的fsk传输系统，含编码，调制，解调，解码等模块。(FSK transmission system based on Hamming code, including encoding, modulation, demodulation, decoding and other modules.)
serial
- FPGA实现232通讯，用verilog语言(RS232 communication design in FPGA with verilog)
ACCx42_AvalonST_Input
- This module does pipelined accumulate operation with 42 bit int value, usually used in dsp, Proved in Altera Stratix FPGA devices
APBL
- APBL通信协议的FPGA设计，适用于高速通讯(APBL communication protocol FPGA verilog design)
AHB_LITE
- AHB_Lite 通信协议的FPGA Verilog 设计(AHB_Lite communication protocol Verilog design in FPGA)
AD胡
- 用FPGA开发板实现FIR滤波器，C2000 DSP教学实验箱(Implementation of FIR filter with FPGA development board)
csa_codes
- carry_select_adder for 16-bit in verilog
Desktop
- 用Verilog编程语言来实现一个具有奇校验功能的串行发送电路，可以采用移位寄存器和有限状态机的方式来实现。(Serial transmission circuit with odd check function)
xyj
- 实现洗衣机六个状态的转换，计时、报警功能。(The realization of the conversion, timing and alarm function of the six states of the washing machine.)
gtx_aurora_zc706_clock_module
- 对aurora模块时钟处理模块，实现时钟的分频等处理(Aurora module clock processing module,Clock frequency division and other processing)