资源列表
frequent
- 这是一个基于复杂可编程逻辑器件CPLD的VHDL语言的有关频率源代码-This is a complex programmable logic device CPLD based on the VHDL language source code related to the frequency
pwm
- 这是用FPGA做的一个pwm波的程序，调试过的非常好用的程序，下载就可以用 ，占空比可以自己改-This is done with a pwm wave FPGA program, debug the program had a very easy to use, download you can use, the duty cycle can do it ourselves
shiboqi
- 数字示波器的完整功能的各个模块的vhdl语言-Full function digital oscilloscope modules in vhdl language
PCM
- PCM信号的码同步提取；短脉冲滤除；VHDL语言-PCM code synchronization signal extraction short pulse filter VHDL language
tcd_driver
- 东芝ccd产品tcd1209驱动程序，生成1209所需的驱动波形-toshiba ccd tcd1209
adc
- 设计ADC控制器，Verilog代码.利用有限状态机设计方法在FPGA上设计ADC0809的接口控制器，采样结果送到数码管显示出来。-ADC controller design, Verilog code using finite state machine design in the FPGA design ADC0809 interface controller, the sampling results to the digital display.
H.264decodeVerilog
- 基于FPGA的EDA设计技术，用Verilog硬件设计语言解压缩H.264格式的视频压缩文件。-FPGA-based EDA design, using Verilog hardware design language decompress H.264 video compression format file.
encoder
- 802.11a卷积码的实现，使用公式133和177，可以用标准viterbi解码-802.11a convolutional code to achieve, using the formula 133 and 177, you can use standard viterbi decoding
convcode
- 基于Modelsim的卷积码(2,1,7)的Verilog实现，采用直接生成-Modelsim-based convolution code (2,1,7) and Verilog implementation of direct generation
silutongbufujieqi
- 介绍了有代表性的较简单的四路同步复接器系统程序设计。- Introduced has the representative simple four group synchronized multiple connection system programming.
Ths1207
- VHDL实现Ths1207控制器，根据硬件电路对THS1207进行配置，并读取AD转换结果。-VHDL implementation Ths1207 controller, according to the hardware circuit configuration of the THS1207, and read the AD conversion result.