资源列表
sin
- 能够实现正弦波的输出以及通过频率控制字与相位控制字控制正弦波的相位与频率。(The output of the sine wave can be realized and the phase and frequency of the sine wave can be controlled by two control words.)
FPGA-spi
- 用于fpga的spi通信,stm32与FPGA之间需要进行spi通信,文件包含接收,发送,以及top层(Spi communication for fpga)
11位巴克码序列峰值检测器
- (1)能够检测巴克码序列峰值; (2)在存在1bits错误情况下,能够检测巴克码序列峰值 (3)具体说明参见说明文档((1) the spike sequence of Barker code can be detected; (2) the spike sequence of Barker code can be detected under the condition of 1bits error)
uart
- UART 功能模块,Verilog,简单实用(UART function module, Verilog, simple and practical)
eetop.cn_无线通信FPGA代码
- 无线通信FPGA源代码,供大家使用啊啊啊啊(wuxiantongxinFPGA VERILOG HDL)
Sleep Away
- what are you doing for your life. You are so young, you have pashion and what the hell are you doing right now
CPU_Verilog
- 此代码完成了流水线CPU的设计。其中有ALU,控制模块,UART等verilog代码。(This code completes the design of pipelined CPU)
tiaowen
- VGA条纹显示 可用 时钟50M赫兹 现代电子学实验编写(VGA asdfghjkkkkkkkkkkkkkkk)
spi
- fpga 作为丛机 8位 spi信息传输 。。。。。。(FPGA 8 bit SPI information transfer as a cluster machine......)
demo_convection_diffusion_POD
- reduced basis for schrodnger
参考例程_Verilog例程
- 很多Verilog语言程序可以实现很多的功能。有详细的例程和讲解PDF。(Many Verilog language programs can implement many functions. There are detailed routines and explanations PDF.)
CCD_Array
- Interface TCD1209DG with Altera FPGA and transfer image data to PC via USB using USB FX2 Slave FIFO mode, Only FPGA code included.
