资源列表
SerialComunications
- Decoder and encoder for the serial communication
syncfifo
- 一个简单的基于single port ram 的同步fifo。只能支持只写或只读。-A simple single port ram based on the synchronization fifo. Can only support write-only or read-only.
LCD12864
- lcd12864的中文显示。可以通过查询ACSII码进行更改。-Lcd12864 Chinese display. You can change the code by querying ASCII.
VGA
- 用verilog编写的vga显示colorbar图像。包含VGA驱动程序，分辨率为640*480.-Vga with verilog display colorbar image. Includes VGA driver with a resolution of 640* 480.
Butterfly_lovers_beef
- verilog编写的蜂鸣器音乐《梁山伯与祝英台》。系统时钟为50MHz。-Verilog prepared buzzer music Butterfly Lovers . The system clock is 50MHz.
async_fifo
- 用verilog编写的简单异步fifo。可以给初学者用来学习fifo的初步工作原理。（不能直接使用。）-Verilog prepared by the simple asynchronous fifo. Can be used for beginners to learn fifo the initial working principle. (Can not be used directly.)
pwm_generate_module
- verilog编写的，用按键控制PWM波占空比。可以定义死区，用来控制舵机或者led灯的亮暗。-Verilog prepared, with the button to control the PWM wave duty cycle. You can define the dead zone, used to control the steering gear or led lights bright and dark.
cla_16bit
- verilog 16bit carry lookahead adder-verilog 16bit carry lookahead adder
qiangda
- 抢答器，3人进行抢答，即对应三个开关，谁先按下，LED输出显示-Responder, 3 answer, that corresponds to three switches, who first press, LED output display
USB_GPIF-II
- fpga模拟两路视频，简单拼接后，经过GPIF II接口传出给cy2014，测试usb的吞吐量-fpga generate two lane video, and transmit them through GPIF II interface. test cy2014
LED
- 简单的流水灯设计，四个灯轮流闪，测试通过-led test， shift
SIN_COS
- fpga产生正弦波形，sin_cos，modelsim仿真通过-fpga generate sin waveform,test passed