资源列表
voter7
- 七位表决器，在QuartusII 13.0中，使用原理图输入，分模块设计，并带有仿真波形-Seven input voters,Designed in QuartusII 13.0,using schematic input design, Three module design, and simulation waveform
traffic_light
- 交通灯控制，分为6个状态，状态1：复位，所有的灯熄灭；状态2：东西绿南北红维持15s时间；状态3：东西黄南北红维持5s时间；状态4：东西红南北绿维持15s时间；状态5：东西红南北黄维持5s时间；状态6：所有变为红灯维持5s时间。各个状态时间可修改，备注清晰-Traffic light control, divided into six states, state 1: reset, all the lights went out 2 State: things green north and
uart
- UART串口通信，50M晶振，256000波特率（从9600到256000可选），8位数据，1位开始，1位结束，没有校验位，测试稳定传输。-UART serial communication, 50M crystal, 256,000 baud rate ( 9600-256000 optional), 8 data bits, 1 start, an end, no parity bit, stable transmission test.
alu
- 这是一个alu源代码，是大学数字电路课的实验课作业。-this is a alu code.
Booth2_16
- 这是16位booth阶2的有符号乘法器及其相关测试程序-16 bit booth order 2 with symbolic multipliers and related test procedures
sp6ex16
- 该文件是一个基于xilinx spartan 6芯片实现了uart通信的源码程序-The document is based on xilinx spartan 6 chip implements the source program uart communication
sp6ex18
- 基于Verilog HDL的对片内RAM进行连续读写测试实例-Based on the on-chip RAM for continuous reading and writing test cases for Verilog HDL
LED_PATTERN
- I HAVE NOW UPLOADED A DESIGN IMPLEMENTING DIFFERENT LED PATTERN ON FPGA BASED BOARD.IN THIS CODE BOTH SEVEN SEGMENT AND LED DISPLAY USED AT THE SAME TIME-I HAVE NOW UPLOADED A DESIGN IMPLEMENTING DIFFERENT LED PATTERN ON FPGA BASED BOARD.IN THIS CODE
OOK_TEST
- 此代码实现了2ASK的调制解调，其中有九位伪随机信号作为信号源，调制时钟可调。-The code is for 2ASK modulation and demodulation.
LCDcontrol
- verilog code for t6963 240128 lcd
LCDTEXT
- another verilog code for t6963 lcd
project_2
- 实现了基于FPGA的FFT变换，从最基本的32位2进制浮点数加减乘运算模块开始，组装出FFT模块。同时仿真文件中有32位浮点数转换为实数的仿真模块便于调试-Realized FPGA-based FFT transform, starting with the most basic 32-bit binary floating-point addition and subtraction multiplication module, a FFT module assembly. At the s