资源列表
dwn_sampler
- Multirate digital signal processing system which includes sampling rate conversion. This technique is necessary for systems with different input and output sampling rates, as the proposed multirate device is downsampler FPGA implementation of
transmitter
- UART transmitter.v.zip
traffic
- 用Verilog语言模拟交通灯实验，内容简单，适合初学者，- Simulation of traffic light experiment using Verilog language
TIMER
- 用Verilog语言模拟的数字时钟的功能，时分秒工能都有，适合做毕设，完整工程-Verilog language simulation of the digital clock function, the time of the second division of the work can be, for the completion of the project, complete
8bits
- 用Verilog语言模拟的8位优先编码器，可作为课堂作业实用，是完整工程代码-Using Verilog language simulation of the 8 priority encoder, can be used as a classroom operation, is a complete code
Binary-BCD-code
- 用Verilog语言写的二进制转BCD码,可以作为课堂教学实验或者课后作业，有完整工程代码-Written in Verilog language transfer binary BCD code, can be used as a teaching experiment or the homework, a complete project code
Four-input-static-display
- 用Verilog语言写四位静态输入显示，可做课堂实验后课后作业，有完整代码-Written in Verilog language, according to the four static input to do homework after class experiment, has a complete code
design_pcie-based-on-FPGA
- the interface design of pcie based on FPGA
PCI_Express
- 详解PCIE基础，架构等，从基础了解到深入理解，适合基础差的-Good explain to pcie for who want to know it
ds1302
- 使用verliog设计实现驱动DS1302，利用altera的cyclone第四代验证通过-Design and implementation using verliog drive DS1302, use altera' s fourth-generation verified by cyclone
stp
- 使用verliog驱动stp液晶显示屏，通过altera的cyclone 第四代验证通过-Stp using verliog drive LCD screen, through altera verified by the fourth generation of cyclone
ps2
- 使用verliog实现ps2键盘接口的驱动，通过altera cyclone 第四代验证通过-Use verliog implement ps2 keyboard interface driven by a fourth-generation verified by altera cyclone