资源列表
sin_cos_module
- Verilog实现的cordic算法的计算sin，cos值得模块，使用rom，代码简洁有效。-Verilog implementation of the cordic algorithm of computing the sine and cosine worth module, use of ROM, the code is concise and effective.
Xilinx_CORDIC
- 非常详细地描述了cordic算法的原理和实现，讲解通俗易懂，有别人旁注的笔记。-Very detailed describes the principle and realization of cordic algorithm, easy to understand, there are others marginal notes
FPGA
- 是一位FPGA大牛写的FPGA杂谈，详细介绍了玩转FPGA的流程和他对FPGA的理解，语言风趣幽默，见解独到深刻。-Is written by a FPGA and FPGA gossip, embracing the FPGA was introduced in detail the process and his understanding of the FPGA, humorous language, independent-minded.
Quartus-II-Handbook
- Quartus II的handbook中英文对照，对掌握quartus有很大帮助。-Quartus II faced, in both Chinese and English are of great help to grasp the Quartus.
c5
- 加法器、乘法器、除法器、DDS函数信号发生器等FPGA实现-Some signal generator build by FPGA！
Demo_03_VGA
- 基于FPGA的的VGA程序，由于开发板的原因，只能显示9种颜色，，用户可以自由拓展-FPGA-based VGA-program, because of the development board, can only display 9 colors,, users can freely expand
txmit
- uart设计，发送模块，无校验位。先输出一个低电平的起始位，然后从低到高输出8个数据位，接着是可选的奇偶校验位（这里没有），最后是高电平的停止位。-uart design, transmit module, no parity. First output of the start bit of a low level, and low to high output 8 data bits, then the optional parity bit (there is no), the last
VerilogUart
- UART 串口通信模块，Verilog 实现。已在Microsemi Actel FPGA A3PE1500 硬件验证通过。-UART serial communication module, Verilog implementation. Verified by Microsemi Actel FPGA A3PE1500 hardware.
code
- high pass filter and low pass filter
1st-wrk
- multiplier code using verilog
2nd-wrk-(1)
- verilog code for shifting of multiplier
code
- verilog code for intrusion matching