资源列表
ecpu
- It is a type of RISC processor..it is easily reconfigurable and virtualizable.it is implemented on FPGA
counter
- 实现技术功能，由待测信号触发使能，在时钟clk的控制下统计计数。-Technological functions, is triggered by the measured signal is enabled, under the control of the clock clk statistics count.
07_dled
- 实现数字字母的显示。。等等。。可以输定设置时间等等，还可以做时钟计时输入-Alphanumeric display.. And so on. You can set a time loser, etc., can also do clock input
filter_VHDL
- FIR filter design using VHDL for 32 bit signed coefficientand 32 bit input and decimation is 4 and its working good
vga1
- 利用Spartan3E 编写代码实现VGA显示器的单色显示、条纹显示等基本显示功能-use Spartan3e to make VGA display single color stripes
mdi_o
- 这个是mdio的源码程序，可以拿来直接用-this is mdio program
1602LCD_Verilog
- 1602 显示的Verilog程序源码 很容易理解-Verilog 1602 display program source code is easy to understand
lab1_4bitsLEDs_4
- 使用verilog语言设计实现 -流水灯实验 -The use of Verilog language design and Implementation- light water experiment
LED_RUN
- verilog 流水灯程序 简单易懂 很好-verilog Light water program easy to understand well
BCDma-verilog
- 二进制转bcd码，很好理解，适合新手用，可以学习学习-Bcd binary switch code, well understood, suitable for novice
siwei
- si wei bijiaqi de verilog daima
RSdecoder
- 自己写的基于verilog的RS译码器，能够实现RS(240，224)码译码，一级流水设计，可连续译码也可非连续译码。-RSdecoder for RS(240,224).