资源列表
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- 波形存储器的设计，利用文件中VHDL可以加载一定的波形数据，文件包含可直接运行的仿真图-Waveform memory design using VHDL file can load some of the waveform data files contain simulation can be run directly Figure
NCO
- 基于FPGA的DDS设计，通过外接DA转换器输出稳定的正弦波，方波和三角波，可单独产生时钟，不必借助硬件连接，包含寄存器程序，累加器程序和时钟发生电路等，以及顶层设计原理图-The DDS FPGA-based design, through an external DA converter output stable sine wave, square wave and triangular wave, can produce a single clock, without the help
1302
- DS1302时钟芯片控制程序。在数码管上显示时间。-DS1302 clock chip control procedures. In the digital tube display time.
SUN
- 基于nios的点阵贪吃蛇游戏设计,可外接PS2小键盘操作游戏-Nios based on lattice Snake game, you can add a small keyboard PS2 games
Lab7
- Adder Substrator 能夠顯示在FPGA上並且能夠實際作加減 可做signed int -Adder Substrator
fre_cnt
- 基于FPGA的频率计模块，数码管显示频率值-Frequency meter module FPGA-based, digital display frequency value
FFT_VHDl
- VHDL实现快速傅里叶变换，内附带资料以及源代码。-VHDL fast Fourier transform, within the supplied data and source code.
hdbn
- This “core” is actually two cores – an HDB3/HDB2/B3ZS Encoder that converts NRZ data into P and N pulses according to ITU-T G.703, and a HDB3/HDB2/B3ZS Decoder that converts P and N pulses into NRZ data according to ITU-T G.703. Note: HDB2 and
IIC_verilog
- IIC控制器，源代码verilog,WISHBONE总线-IIC controllers, the source code verilog
demodulation
- QPSK解调程序，verilog语言，基于FPGA的硬件描述语言-QPSK demodulation
i2s interface
- i2s interface VHDL language FPGA. Using for MEMS microfone
USB VHDL
- Full USB interface fo FPGA CPLD VHDL