资源列表
GPS
- 本程序实现功能为接受GPS接收机时间信息，并编码形成IRIG-B时间码，同时跟设备总线通过485进行通信。包括原理图，单片机程序及CPLD程序。-This program implements functionality GPS receiver for receiving the time information, and encoding IRIG-B time code is formed, while with the device 485 to communicate via the
DDS
- 基于DDS的信号发生器，产生10KHZ-15KH的正弦波、三角波信号；频率字M按键输入，每次增量1；-DDS-based signal generator
sdram_basemod
- 可以实现sdram的页读写功能，其中加了两个FIFO缓冲器，只需稍改就可以加入工程。-Sdram page can read and write capabilities, including the addition of two FIFO buffers, just a little change can join the project.
ADC_TLC549
- verilog编写，利用fpga自带ADC芯片tlc549实时采集电压信号，并通过数码管显示。-verilog write, use fpga comes tlc549 ADC chip voltage signal real-time acquisition and through digital display.
rx_tx_demo
- 用verilog实现的少量字符串的连续收发，添加了FIFO模块，稍微修改下就可以使用。-Receive a small amount of a continuous string of verilog implementation, added FIFO module, can be used under slightly modified.
sdram_singale_word
- 使用verilog驱动的sdram单字节读写，可以学习一下sdram最基本的功能，学习sdram参考程序。-Use sdram verilog-driven single-byte read and write, you can learn the most basic functions sdram, sdram reference learning program.
saw
- verilog编写，巧妙的通过计数方式完成了三角波的波形，可直接对da输出。-verilog written, cleverly accomplished by counting the triangular waveform can be output directly to da.
DDS
- verilog编写，使用fpga中dds手法，可以输出任意波形的发生信号。-verilog write, use the dds fpga way, you can output an arbitrary waveform signal occurs.
test-series-10010
- 用于检测序列10010的程序，Verilog的状态机练习-Used to test series 10010 program, Verilog state machine practice
Verilog
- Verilog语言编写教程，用于基础知识学习很有帮助。-Verilog language tutorial, very helpful for learning basic knowledge.
fpga数字示波器
- fpga数字示波器，可以显示波形，功能强大，你值得拥有！！！！！！！！！！！！！！！
final
- this vhdl code is for a 4th floor elevator control.