资源列表
dds
- FPGA所需要的DDS源码，可实现波形输出，采用VHDL语言，简单易懂。-FPGA need DDS source waveform output can be achieved using VHDL language, easy to understand.
Zynq_AMP_Example
- ZYNQ 平台搭建，ZYNQ芯片的应用，初学者有一定的帮助-ZYNQ platform to build, ZYNQ chip applications. Beginners will certainly help
spi_mcu
- SPI Slave接口，实现与外部控制器的接口。实现外部SPI口到逻辑内部寄存器模块接口的转换-SPI Slave interface, interface with external controller. SPI port to achieve external conversion logic module interface internal registers
DE0_NANO_SDRAM_Nios_Test
- SDRAM Test by Niios II Many applications use SDRAM to provide temporary storage. In this demonstration hardware and software designs are provided to illustrate how to perform memory access in QSYS. We describe how the Altera’s SDRAM Controller IP is
DE0_NANO_SDRAM_Nios_Test
- SDRAM Test by Niios II Many applications use SDRAM to provide temporary storage. In this demonstration hardware and software designs are provided to illustrate how to perform memory access in QSYS. We describe how the Altera’s SDRAM Controller IP is
lcd12864_hanzi_zifu
- 基于vhdl的12864 字符和汉字显示程序，带字库，亲测可用-Based vhdl 12,864 characters and character display program, with character, pro-test available
cnt1_fenpin
- 基于vhdl的任意分频程序，可调占空比，-Based on an arbitrary dividing vhdl procedures, adjustable duty cycle,
dds
- 基于vhdl 和DDS 的直接频率合成程序，并产生正弦波-Vhdl and DDS-based direct frequency synthesis process and generate a sine wave
ADC_DAC_V2.0_EP2C35Q240C8
- 基于vhdl的AD DA 高速转换，EP3C25Q240-Based vhdl of AD DA conversion speed, EP3C25Q240
LCD-1602
- 基于vhdl的lcd1602的显示程序，-Based on the lcd1602 vhdl display program,
pcm_read_cmd
- 对于NEXYS3开发板，对于PCM 的读操作时序-the time of reading PCM on NEXYS3
pcm_unlock_rdreg_prog
- 在NEXYS3开发板上，对于PCM的写操作时序-the time of programming PCM on NEXYS3