资源列表
Alterafpga_jtag
- Altera FPAG USB jtag下载线制作资料,对制作及学习很有用-Altera FPAG USB jtag download cable production data, production and learning useful
JPEG
- 本文首先介绍了静态图像压缩（JPEG）编码算法的基本原理、压缩的实现过程及其重要过程的离散余弦变换（DCT）算法的实现原理及软件实现的例程，其次着重介绍了压缩过程中的DCT、量化和编码三个重要步骤的实现原理。-This paper describes the static image compression (JPEG) coding algorithm is the basic principle of compression process of the implementation pro
Verilog_SOM
- 神经自适应算法的Verilog 实现,Som-Verilog, SOM
pwm
- 在Quartus 9.0 下实现的PWM IP核设计，周期占空比均可调。-PWM IP core design,which period and duty is adjustable.
CPU
- 用VHDL设计的cpu 用微指令方法设计 通过rom查表的方式进行设计-Cpu design with VHDL designed by microinstructions way through the design of look-up table rom
gequ
- 梁祝歌曲，用vhdl语言实现，在蜂鸣器上实现唱歌功能-Butterfly song
part01
- 周立功嵌入式系统实验教程中配带光盘资料，共分五部分-Ligong week experimental course in embedded systems equipped with CD-ROM, is divided into five parts
trafficlight
- 已应用在北京某校园内的交通灯控制程序，可以自动控制，手动控制，可以输入设定时间等等。verilog源代码-Has been used in a Beijing campus traffic light control procedures can be automatic, manual control, you can enter the set-up time, etc.. verilog source code
MIPS_CPU
- 一个完整的MIPS CPU的设计，是创新设计项目，内含详细的项目设计报告-A complete MIPS CPU design, innovative design projects, detailed project design report containing
i2s_to_parallel
- wm8731音频采集芯片的I2S采集时序的vhdl实现。-wm8731 I2S audio capture chip timing acquisition vhdl implementation.
VHDL-SPI-Module.doc
- 本spi参数化通讯模块是一个支持SPI串行通信协议从协议的SPI从接口。可通过改变参数设置传输的位数，由外部控制器给定脉冲控制传输。-The parameters of spi communication module is a support SPI serial communication protocol from the agreement from the SPI interface. By changing the parameter settings can be transmit
music_ok
- 简单的通过FPGA控制蜂鸣器播放音乐程序（verilog 源码）-Through the FPGA to control the buzzer play the music program (Verilog source code)