资源列表
Alarm-Clock
- VHDL开发环境下，编写的可以异步置数闹钟，需下载到特定硬件后，方可实现功能。-VHDL development environment, written asynchronously set the number of alarm clock, need to download to a specific hardware only after the realization of the function.
Sequence-detector
- VHDL环境下编写的序列检测器，当检测到设定序列时，硬件的提示灯会亮，也会发出警示音。-Sequence detector written in VHDL environment, when detected, set the sequence, the light will also alert tone hardware tips.
Uart
- UART source code in verilog
parity_check
- Parity checing program in verilog
Sound
- PS2 Keyboard interface
sumUnit
- 包含一个将二进制加法结果转换为3位BCD码的结构。以方便用七段译码器显示结果。-Convert result of binary adding to 3-digits BCD code, and thus make it easy to display the result with 7 segments decoders.
IEEE802_16e
- IEEE802_16编码器 verilog代码-intervel ieee802.1
i2c_con
- 用FPGA模拟I2C对TVP5150AM1芯片进行配置，属于简单的I2C应用，用FPGA模拟，省去了用硬件实现I2C，是的工作简单。-Simulation using FPGA I2C on the TVP5150AM1 chip configuration, belonging to a simple I2C application, using FPGA simulation, eliminating the hardware implementation of I2C, the work
sdr_sdram
- 用FPGA实现SDRAM的控制，主要是将SDRAM的时序搞懂，这个很好做出来了。-Using FPGA realize SDRAM control, mainly the SDRAM timing out, this is very good do.
123
- 在FPGA中用状态机实现对数码管的控制很好的了解一下状态机-State machine in the FPGA with the control of the digital control
zaidaidankuaipaipinghua
- 窄带信号単快拍测向 通过平滑 提高信噪比 -Narrowband signals and single-snapshot direction finding Improve the signal to noise ratio by smoothing
xapp378
- Design of a NAND flash controller of AMD flash