资源列表
sap_latest.tar
- This 8-bit microprocessor with 5 instructions. It is based on 8080 architecture. This architecture called SAP for Simple-As-Possible computer. It very useful design which introduces most of the basic and fundamental ideas behind computer operation.
fast-crc_latest.tar
- A 32-bit parallel and highly pipelined Cyclic Redundancy Code (CRC) generator is presented. The design can handle 5 different channels at an input rate of 2Gbps each (the total output throughput is 5x4Gbps.)
viterb_encoder_and_decoder_latest.tar
- Category: Arithmetic core Language: Verilog Development status: Mature Additional info: Design done, Specification done WishBone Compliant: No
fpu100_latest.tar
- Features - FPU supports the following arithmetic operations: - Add - Subtract - Multiply - Divide - Square Root
vdhl
- 这个是一些VHDL硬件描述语言例子，可以对初学者有很大帮助。-examples for VHDL
VHDL--examples-and-answers
- 这些是VHDL设计的练习例子及答案总结，可以加速理解硬件描述语言。-Verilog HDL
Example-8-1
- 我的观点是Verilog和VHDL对于高手而言各有利弊，Verilog感觉更适合于RTL（寄存器传输级）的描述，而VHDL更适于System级的建模。 但是初学者强烈建议学习Verilog，更容易入手些，但是学习过程中一定要注意下面一点，毕竟国内外大公司现在大都采用Verilog是有其原因的。 l FPGA/CPLD、ASIC的逻辑设计所采用的硬件描述（HDL）语言是同软件语言（如C，C++等）是有本质区别的！虽然Verilog很多语法规则和C语言相似，但是Verilog是硬件描述
wallace
- wallacw tree multiplier code in vhdl language mainy used for the multiplications in the image [processing of both dct and dwrt applications-wallacw tree multiplier code in vhdl language mainy used for the multiplications in the image [processing of
Verilog
- Verilog代码的基础例程，对初学FPGA来说很有帮助-Verilog code routines, helpful for the beginner FPGA
elevator
- 六层电梯控制，与实际电梯的运行逻辑一致，开门后5s自动关门（注：无快速关门和开门功能）-Six-story elevator control, consistent with the actual logic of operation of the elevator opened the door automatically closed (Note: No quick closing and opening function 5s)
sd
- NIOS 从SD卡读取图片显示在TFT屏上-NIOS read images from SD card displayed on the TFT screen
onchip_seg
- NIOS FPGA片上存储器的核12345673564-NIOS FPGA on-chip memory nuclear 12345673564