资源列表
ram_led
- 文件包括分频、计数、伪双口ram读些和数码管显示，将50MHz的时钟分频为1Hz并计数，然后将结果存储在RAM中，然后读取计数结果并显示。-File divider, counting, pseudo-dual port ram read digital display, 50MHz clock frequency of 1Hz and count, then the result is stored in RAM, and then read the count results and dis
Decade-Counter
- decade counter with two input and count out outputs
fwwallace
- wallace tree multiplier in verrilog
verilog测试代码
- ug193.zip
mux-top-module
- Vhdl implementation of Mux module using and gate or gate and with testbench
FIFO-and-CAM
- verilog code for gray counter,synchronous and asynchronous fifo
lfsr-counter
- descr iption for LFSR counter
memories-dual-port
- descr iption for memory dual port
encoder-8b10b
- 可以实现8b10b编码，verilog源程序，经过测试-8b10b Encoder
decoder-8b10b
- 可实现8b10b解码的verilog程序，经过测试-8b10b decoder，verilog
sourcefiles-for-chip-scope-(serial-type-IDEA)
- this code is for IDEA(international data encryption algorithm)
zedboard
- 关于xilinx最新出来的开发板zedboard的一些资料-Information about the xilinx Latest the development board zedboard out some