- SugarCRM4 如果你想从事asterisk方面的话可以看看CRM
- 7z920002_64 SQLite3 Wrapper Seven Makr Zip 64bit D
- 556405256tcpip the simple code tells how tcp ip WORK
- softTimer 软件定时器
- houdini-master Cimple API for escaping text for the web. And unescaping it. But that kind of breaks the joke in the name so nevermind.
- Spice_For_Circuits_And_Electronics_Using_Pspice.z This is an important set of all Pspice programs serial codes and so and so forth for your perusal
资源列表
FPGA-application
- 28个FPGA应用开发代码实例，可供初学者学习使用-28 FPGA application development code examples
alarm
- 利用vhdl和verilog两种方式可以实现的fpga芯片的数字钟，其中包含多个可设计改动的个性化模块。源代码利用quartusii平台写作，可移植性很强。-Using vhdl and verilog fpga can be achieved in two ways-chip digital clock, which includes several design changes personality module. Source code using the platform quartu
calculator
- 利用verilog和vhdl两种语言写作的计数器，还有个性化设计模块，利用quartusii平台写作。-Use verilog and vhdl counter writing in two languages, as well as personalized design module, using the platform quartusii writing.
booth
- 比较好的带符号数乘法的方法是布斯(Booth)算法。它采用相加和相减的操作计算补码数据的乘积。Booth算法对乘数从低位开始判断，根据两个数据位的情况决定进行加法、减法还是仅仅移位操作。-Signed multiplication better approach is to Booth (Booth) algorithms. It uses the operation of addition and subtraction calculations complement data of the
alert
- eda电子钟闹钟模块的实现 -digital clock alert digital clock alert digital clock alert digital clock alert
conunt
- eda电子钟计时模块的实现 eda电子钟计时模块的实现 eda电子钟计时模块的实现-eda count eda count eda count eda count eda count eda count eda count eda count
CNT4
- ise组合逻辑电路中的4选1多路选择器+仿真文件-ise combinational logic circuit 4 to 1 multiplexer+ simulation file
count_8
- ise13.2环境下编写的8位二进制计数器+仿真波形-ise13.2 environment prepared by the 8-bit binary counter+ simulation waveforms
DFF1
- ise13.2环境下编写的D触发器+仿真波形-ise13.2 environment prepared by the D flip-flop+ simulation waveforms
f_adder
- ise13.2环境下vhdl编写的全加器+仿真波形-ise13.2 vhdl prepared under the full adder+ simulation waveforms
h_adder
- ise13.2环境下VHDL编写的半加器器+仿真波形-ise13.2 environment half adder in VHDL simulation waveform control+
mux21
- ise13.2环境下VHDL编写的2选1多路选择器+仿真波形-ise13.2 environment, VHDL, 2-to-1 multiplexer+ simulation waveforms