资源列表
music_qhc
- 本例程使用verilog语言编写的一段用蜂鸣器播放的周杰伦的青花瓷，简单易懂，适合初学者。-The routine use of verilog language section with a buzzer play Jay' s blue and white porcelain, easy to understand for beginners.
shiyanqdq
- 基于FPGA 实现的4人抢答器模块的基础源程序。-FPGA-based realization of four Responder module
gamefinal_11998
- 基于FPGA 的打地鼠游戏的设计。在xilinx上运行。-FPGA-based play hamster game design. In xilinx run.
hitmouse
- 基于FPGA 的打地鼠实验的源代码。可以拓展为类似弹钢琴的程序。-FPGA-based fighting to control the experiment source code. Can be extended for a similar program to play the piano.
eda_shiyanbaogao
- eda实验报告，包括全加器、四选一数据选择器、交通灯。-eda lab reports, including full-adder, four elected a data selector, traffic lights.
verilog-uart-rs232
- verilog HDL 描写的uart程序 由PC端接收然后+1返回 等等 东南大学09级4系综合课程设计-verilog HDL descr iption uart program Received by the PC side and then+1 back。 SEU..
CPU
- 东南大学VHDL课程CPU设计 Verilog语言-Southeast University, CPU design Verilog language VHDL course
lab2_cordic
- 在FPGA上实现Cordic算法用于计算sin(x)。Cordic算法的全称是Coordinate Rotation Digital Computer ，可以用于实现对多种超越函数的运算。-Implemented on FPGA Cordic algorithm is used to compute sin (x). Cordic algorithm stands Coordinate Rotation Digital Computer, can be used to achieve a var
1
- VHDL频率计的设计 验证过能用 大家一起学习交流-Use VHDL cymometer design validation
state_machine
- verilog编程状态机实战训练：1.本实例通过实现一个状态机来控制8个LED循环闪亮； 2. 工程在project文件夹里面； 3. 源文件和管脚分配在rtl文件夹里面； 4. 下载文件在download文件夹里面。-verilog programming state machine combat training: 1. This example by implementing a state machine to control 8 LED flashing cycle 2
Odd-Frequence-Dividing-Circuit
- 一种奇数分频电路的设计方法，采用verilog HDL描述。修改代码中参数可以进行任意奇数分频，包含了设计文档和源代码。-A design of odd frequence dividing circuit is presented, which is described by verilog HDL。Change the parameter in code, one can get any odd numbers of frequence dividing circuit.
add4_fast_carry
- 一个4位超前几位加法器的设计，在modelsim中仿真通过。-This is a carry lookahead adder design, which is simulated successfully in modelsim.