资源列表
mp3_player
- 用vhdl结合sopc编写的MP3的程序 可以在硬件上跑通 包含仿真程序-Written in conjunction with vhdl MP3 sopc program can run on the hardware via emulation program included
SPI
- verilog写的SPI总线程序，已经通过验证！-verilog write SPI bus program has been validated!
std_ovl_v2p7_Feb2013
- 目前最新的OVL库，里面是标准的ASSERTION模块，支持VHDL刚Verilog，最近在做AXI协议验证的时候用到，分享下-The latest OVL(open verification library),including all standard module of assertions(VHDL and Verilog). It can be used into AXI Protocl Verification. Just share with you guys.
nand_model
- Nand Flash的Verilog代码，可以用于对nand flash操作的仿真-Verilog code of Nand Flash. It can be used for nand flash operate simulation.
PS2-verification
- It is made a verification of a FPGA board with a keyboard and a VGA
UART-finite-state-machine
- 基于Verilog语言的，用有限状态机实现Uart，很实用-UART design based on finite state machine
clock
- 设计一台能显示时、分、秒的数字电子钟，具体要求如下： （1）时计数器用24进制计时电路，分、秒计数器用60进制计分、计秒电路； （2）可手动校时，能分别进行时、分的校正； （3）能实现整点报时功能。 -Design a table can display hours, minutes and seconds of digital electronic clock, the specific requirements are as follows: (a) when the cou
cnt4
- 4位2进制计数器，可以灵活组装成任意位数的2进制计数器-4 binary counter, can be flexibly assembled into arbitrary digit binary counter
NCO
- 查表法实现NCO数控振荡器，16位频率控制字深度1024，包含ROM表-nco rom
DE2_NET
- 非常好的源代码文件 已经在fpga开发板上验证-Very good source code files have been verified in fpga development board
VGA
- 实现vga的实现odule VGA( clock, switch, disp_RGB, hsync, vsync ) input clock //系统输入时钟 50MHz input [1:0]switch output [2:0]disp_RGB //VGA数据输出 output hsync //VGA行同步信号 output vsync //VGA场同步信号 reg [9:0] hcount //VGA行扫描计数器 re
fftip_1k
- FFT IP核调用 VHDL语言 quartus -FFT IP core VHDL language called quartus