资源列表
FPGA11_DAC
- 基于FPGA Verilog 按键调节DAC-Based on the FPGA Verilog buttons adjust the DAC
FPGA12_I2C
- 基于FPGA Verilog I2C 接口通讯-Based on the FPGA Verilog I2C interface communication
FPGA13_SDRAM
- 基于FPGA Verilog SDRAM 单字通讯-Based on the FPGA Verilog SDRAM words communication
edge_catch
- 信号去抖动处理程序，通常在时钟沿到来时，信号出现不稳定，这个程序可以处理-signal process jitter
FPGA
- FPGA开发技术相关资料，可以提供给新手，中手用来进行相关内容的加深学习。-FPGA development technology-related information can be provided to the novice, the hand used to deepen the study of relevant content.
Regfile
- 利用Xilinx ISE14.3，用Verilog HDL 语言编写的计算器与寄存器堆程序，在Spartan Ⅲ板上调试通过。-Use Xilinx ISE14.3, using Verilog HDL language of computers and register file program, Spartan Ⅲ board through debugging.
multi_cpu
- 用xilinx ISE 14.3开发的多周期CPU系统，开发语言为verilog HDL.仿真调试与实际测试均已通过-Using xilinx ISE 14.3 development of multi-cycle CPU system, development language for verilog HDL. Simulation debugging and practical tests have passed
lab5
- 用xilinx ISE14.3开发的单周期CPU系统，面向spartan Ⅲ板，仿真调试与实际测试均已通过。-Developed by xilinx ISE14.3 single-cycle CPU system, facing the spartan Ⅲ board simulation debugging and practical tests have passed.
KEY4X4_1
- CPLD/FPGA，VHDL语言实现键盘按钮扫描，键盘扫描程序-CPLD/FPGA, VHDL language keyboard button scanning, keyboard scanning procedures
lab2parte1
- We want to show the values set through the switches SW8-1 on the 7-segment display and HEX0 Hex1. Values are denoted SW4 and SW8-5-one, shown in Hex1 and diplays HEX0, respectively. Your circuit must be able to show the digits 0
AD9226
- 一个AD9226芯片的驱动，用FPGA写的。虽然简单，但是希望对各位有帮助-An AD9226 chip driver, FPGA written. Though simple, but I hope you will help
AD9764
- 一个AD9764的基于FPGA的驱动，希望对有需要的朋友有所帮助-An AD9764 FPGA-based drive, we want to help a friend in need