资源列表
leijiaqi
- verilog 语言描述的累加器和乘法器-verilog code
FPGA_SPI
- 应用于FPGA的SPI接口，可以用于参考或者二次开发-SPI interface used for FPGA
cpld-6
- cpld实现功能的操作，实现信号功能的控制和数据的读写，能够完成指定的功能-cpld achieve functional operation, to achieve the control and data signal functions to read and write, to complete the assigned functions
QuartusII_SPI
- 這個是SPI Model Verilog Code 已經透過Quartus II 完成 Compiler 沒有問題 -This is the SPI Model Verilog Code has been completed through the Quartus II Compiler no problem
ddr3_top
- xilinx DDR verilog 控制器-DDR verilog controller FOR XILINX
qdr2_top
- xinlinx QDR2 contoller for verilog
eqm
- verilog eqm for xinlinx
gmac
- verilog gmac for xinlinx
map
- map verilog for xilinx
pprx
- pprx verilog for xilinx
Moore
- VerilogHDL语言实现的Moore 序列检测器-VerilogHDL language of Moore sequence detector
Mealy
- VerilogHDL语言实现的Mealy序列检测器-VerilogHDL language of Mealy sequence detector