资源列表
x1286
- 实现外部ADC采样,并且能证明数据的正确性，这个代码是经过实际的仿真实现的-Implement an external ADC sampling, and can prove the correctness of the data, this code is implemented after the actual simulation
Peak_SNR
- it describes how to calculate psnr for colorimage
Micro
- build micro with verilog/vhdl
SEG7
- 基于xilinx的开发板，利用verilog语言实现扫描数码管，小键盘和计数的功能-Xilinx development board based on the use of digital scanning verilog language, keypad and counting functions
ICAD
- 基于verilog的A/D采样控制电路设计，包括代码和仿真图像-Verilog based on the A/D sampling control circuit design, including code and simulation images
DigitClock
- 基于FPGA的电子钟设计，有时分秒的按钮调节。重置，清零功能-FPGA-based electronic clock design, sometimes the buttons to adjust the minutes and seconds. Reset, clear function
relay
- code for relay in mobile jamming
adder
- 选择相加器，可以通过拨动开关控制输入1，输入2，输入3的相加顺序。-Choose the summator, can through the toggle switch control input 1, type 2, input the addition order of 3.
nco
- 利用数字振荡器产生一个正弦波。修改参数可以修正弦波频率幅度相位。-Using the digital oscillator generates a sine wave. Modified sine wave frequency parameters can be modified amplitude and phase.
Phone-Call-Meters-by-Quartus9.2
- 本次设计主要基于FPGA器件完成了一个IC电话计费器的设计，其能够显示用户IC的卡值余额，并能够根据用户当前的话务种类和通话时间进行扣费，并将用户的实时余额和通话时间通过4位LED七段显示器显示出来。整个设计过程采用自顶向下的分块设计方法，即将整个电话计费系统分为电话计费、计时模块和显示模块两大模块，其各模块的实现是基于QuartusⅡ9.2平台使用DE0硬件描述语言编程实现的。-This design is mainly based FPGA devices completed a telep
sdram_verilog
- 基于verilog语言的SDRAM控制器-SDRAM controller based on verilog language
Using-fpga-implementation-SDI
- 用fpga实现SDI（ xapp1014-xilinx-sdi）赛灵思原厂资料-Using fpga implementation SDI (xapp1014-xilinx-sdi) Xilinx original data