资源列表
Cyclone4_115_IR
- FPGA下红外收发项目工程，基于cyclone4 芯片，包括项目verilog源码已经sof下载文件，对于基于fpga的红外模块开发很有参考价值。-Project under infrared transceiver FPGA based cyclone4 chips, including project sof verilog source code has been downloaded files for fpga-based infrared module development of
DCT_IP_Testbench
- 一个DCT变换的完整IP，基于Verilog编写，同时包括完成的testbench，方便模块的仿真和测试。-DCT transform a complete IP, based on Verilog prepared, including both complete testbench, convenient module simulation and testing.
Signal3
- ISE设计的三角波发生器VHDL实现及报告-ISE Design of the triangular wave generator VHDL implementation and reporting.
T
- T触发器 T触发器VHDL实现及报告 FPGA-T flip-flop VHDL implementation and reporting.
verilogiic1121
- IIC的好程序，VHDL程序设计。有收藏价值。-iic
qiangdaqi
- 设计一个四路抢答器。抢答器必须具有互锁功能，同时抢答时每次只能有一个输出有效。同时，抢答时具有计时功能，限定选手的答题时间，在接近规定时间时进行提示，达到规定时间发出终止音。主持人可控制加分或减分。-Design a four-Responder. Responder must have the interlock function, while there can be only one answer when output is active. Meanwhile, the answer,
simple-GBW-gauge
- 本程序为基于51单片机和cycloneIII FPGA与外围电路的运放GBW(单位增益带宽)测量程序。-This procedure is based on 51 single chip microcomputer and cycloneIII FPGA and peripheral circuit of the op-amp GBW (unit gain bandwidth) measurement procedures.
好用的UART程序
- 实现硬件和PC的UART互联通信！ 实验证明，功能正常
tongxin485
- 关于Verilog语言学习-485通信程序-Verilog on language learning-485 communication program
design
- 移动目标识别与跟踪 移动目标识别与跟踪-Moving target identification
Bonus-Lab-Test-Version-draft6
- Verilog implementation of 8 bit computer for FPGA
20131010-code
- fx2lp 68013 xilinx XC3s400 实现slave fifo通讯，包括68013的固件以及fpga的代码（verilog）。摸了好久才调试通过的，特共享出来解救苍生！-fx2lp 68013 xilinx XC3s400 slave fifo