资源列表
heh
- vhdl的课件，比较好……欢迎下载，联系我，我们会成为好朋友的-vhdl courseware, is better ... ... welcome to download, contact me, we will become good friends ... ...
vgav2
- fpga vga 输出，60HZ 640*480 8位灰度图像 采用verilog语言编写-fpga 640*480 60HZ vga output，writed in verilog
61EDA_C878
- fpga tv转vga 解码器adv7180，视频转换adv7123-fpga tv to vga，decoder adv7180，video converter adv7123
DE2_TV_PAL
- video信号pal制转vga输出，fpga verilong语言编写-fpga pal to vga ，writed in verilog
design_of_vga_controler_module_by_fpga
- 基于FPGA平台的VGA时序控制模块的设计-design of vga controler module by fpga
50846288C
- verilog 硬件编程实现bpsk调制-verilog hardware, programming bpsk Modulation
verilog
- 一些关于verilog的常用编程程序例子-About verilog examples of common programming procedures
50846288D
- 关于verilog的编程学习，简单的介绍了erilog的编程方式-Verilog to learn about programming, a simple introduction to the programming mode erilog
examples
- verilog程序设计教程，对一些常用的verilog程序总结-verilog programming tutorial, for some commonly used procedures for summary verilog
90205E3Cd01
- Verilog Design in the Real World
uart-vhdl-testbench
- simple uart vhdl behavioural model (package) vhdl testbench example
Acr67.tmp
- 教你如何使用modelsim 非常好一个的教程-Teach you how to use the modelsim a very good tutorial