资源列表
i2cxlinx
- xilinx版本的i2c的VHDL语言版-i2c of xilinx(vdhl)
sqrt
- This zip file contains the verilog source code for square root calculation and its test bench
FastCplxMuply
- This zip folder contains the verilog code for fast complex multiplication source code and its test bench
fpga_sopc
- fpga_sopc教程-fpga for sopc
Admittance_Relay
- This zip file contains the admittance relay using verilog HDL in XSE 9.2i environment-This zip file contains the admittance relay using verilog HDL in XSE 9.2i environment
FPGA_Book_cd
- 《无线通信FPGA设计》包含的所有例子源码,包括matlab仿真和verilog源码,本书内容还是非常丰富的,涉及无线通信领域各个方面。不过对于一些比较新的技术,其FPGA实现部分过于简略,难以在工程中实用化。-" Wireless FPGA Design" contains all the examples source code, including the matlab simulation and verilog source code, the contents of
fpgatri
- FPGA三态门的VHDL实现。包括2种不同的实现方法。编译环境是Quartus-VHDL 3-state gate FPGA implementation. Including two kinds of different implementations. Build environment is Quartus
sdram_ver_134
- This code is a SDRAM Controller IP Core for FPGA to interface with SDRAM Memory. This code is based Xilinx FPGA Playform.
sdram_vhd_134
- This code is a SDRAM Controller IP Core for FPGA to interface with SDRAM Memory. This code is Verilog. This code is based Xilinx FPGA Playform.
VHDL
- Program VHDL is scan keypad matrix 3*3 display to LCD
sopc_timer
- sopc的一个典型应用,使用的部件为niosII软核中的timer定时器,内容详细,包括所有的源代码。-sopc a typical application, the use of soft-core components of niosII timer in the timer and detailed, including all the source code.
QuartusII_error_Analysis
- altera fpga编程过程中常出现一些错误及其消除方式,属于集体智慧的结晶-altera fpga programming mistakes often occur during its elimination method, belonging to the crystallization of collective wisdom
