资源列表
QuartusII_Warning_analyse
- quartus2警告信息解决办法补充说明。 -quartus2 warning message solution supplement. quartus2 warning message solution supplement.
16bit_pipeline
- 16 bit pipeline design by vhdl.
as2
- 这是关于Vhdl编程语言的基础。讲述了硬件 描述语言及其编程特点-This is about Vhdl programming language foundation. Described the characteristics of the hardware descr iption language and its programming
Luces_Secuenciales
- SEQUENTIAL LIGHTS WITH STROBER EFFECT IN VHDL FOR FPGA
FILTRO_DIGITAL_EN_VHDL
- DIGITAL FILTER IN VHDL FOR XILINX FPGA SPARTAN 3
FINAL
- MESSENGER BETWEEN 2 FPGA WITH PS2 KEYBOARD CONTROLLER AND VGA CONTROLLER USING SERIAL TRANSMISION
countall
- 时钟总片,有年月日分钟秒钟，秒表，三个闹钟，调时。总共需要三个控制键-clack system
VHDL_100example
- vhdl编程100例，初学者可以参考下，希望对大家有帮助-vhdl programming 100 cases, beginners can refer to, hopefully help to everyone
s3esk
- spartan 3e开发板的实验例程，包括对应的说明文档-spartan 3e development board test routines, including the corresponding documentation
Guide_to_HDL_Coding_Styles_for_Synthesis
- 讲述了HDL编码风格的一本好书，不论使用VHDL或verilog的都可以-HDL coding style tells a good book, regardless of the use of VHDL or verilog can take a look at the
ad7862
- 运用VerilogHDL实现AD7862的数据采集设计-using VerilogHDL by AD7862 to collect data
songer
- VHDL的电子琴设计,欢迎大家下载-VHDL design