资源列表
MCS51_cpld
- VHDL语言编写的cpld与51单片机总线通信程序。结果应用证明。-VHDL language of the CPLD and 51 microcontroller bus communication program. Application results prove.
elevator_fpga
- 基于VHDL的FPGA设计，设计一个4层楼的电梯控制系统。-VHDL-based FPGA design, design elevator control system of a four-storey building.
vga_fpga
- 基于VHDL的FPGA设计，VGA显示设计。-VHDL for FPGA-based design, VGA display design.
clock_fpga
- 基于VHDL的FPGA设计，设计一款多功能的电子定时器，包括计时跟倒计时。-VHDL-based FPGA design, design a versatile electronic timers, including the timing with the countdown.
cordic_fpga
- 基于VHDL的FPGA设计，利用CORDIC IP核设计角度的正余弦算法。-Cosine algorithm VHDL based FPGA designs using CORDIC IP core design angles.
256M_sdram_OK
- 改自特权同学verilog语言写sdram测试程序；支持256M内存-verilog sdram
multiply_vhdl
- 用VHDL语言设计一款带进位的5位乘法器。-Design with VHDL into a 5-bit multiplier.
freq
- VHDL入门学习，基于FPGA的频率计设计-Getting started learning VHDL, FPGA-based frequency meter design
sdram_ov7670_rgb
- ov7670+sdram+vga显示的代码，用verilog写的 ，fpga开发时的参考资料-code ov7670+sdram+vga displayed with verilog written references when fpga development
mvhdl
- m序列发生器vhdl语言quartus2-m sequence generator vhdl language quartus2
9a801d06cc48
- 关于rel的编码，rel编码器的源程序代码以及分析，-About rel code, rel code source code and analysis
1
- verilog HDL文件 PS你们网站做的有点差。。。 verilog HDL文件 verilog HDL文件 verilog HDL文件 verilog HDL文件 -verilog hdlverilog hdlverilog hdlverilog hdlverilog hdlverilog hdlverilog hdlverilog hdlverilog hdlverilog hdlverilog hdlverilog hdlverilog hdlverilog hdlverilog