资源列表
URAT-code
- 使用Verilog HDL语言编写的URAT接口代码，实现串行数据传输功能-UART of Verilog HDL code to realize serial communication functio by Simon of Shenzhen University.
uart
- 这是一个8位串口收发数据的源码，每个模块都有详细的源码-This is an 8-bit serial data transceiver source, each module has a detailed source
I2c
- 这是一个I2c源代码，通过数码管显示通信的数据-I2c which is a source code display by a digital data communication
ly4638_I2Cdesign
- I2C协议的VHDL设计，利用I2C来实现温度传感器的显示并在FPGA上实现。-VHDL I2C protocol design, to achieve the display using I2C temperature sensor and implemented on FPGA.
XILINX DDR2
- xilinx ddr2 ip核的verilog例子
Verilog_100exaples
- Verilog的100个经典设计实例，包括交通灯的设计代码，智能时钟的设计代码，各种加法器。乘法器的设计代码-100 classic Verilog design examples, including the traffic light design code, intelligent clock design code, a variety of adder. Multiplier code
vga_vhdl
- vga vhdl 语言编写的vga驱动代码在spartan3e开发板上通过-vga vhdl language vga driver code development board through the spartan3e
VHDL_TFT-LCD_controler
- 超帅VHDL_TFT_LCD屏控制器的操作，简单易懂，已验证通过了-Operation super handsome VHDL_TFT_LCD screen controller, easy to understand, has been validated by the
Lab4
- 基于zynq开发板的嵌入式系统一个demo，实现led点亮。使用xps开发工具实现的。-Zynq development board based on an embedded system demo, realization led lights. Use xps development tools to achieve.
pingpong_operation_FIFO
- 通过fifo实现乒乓操作的功能，具有数据缓存的作用，特别适用于高低速的数据传输-Ping-pong operation realized by fifo function has the effect of data cache, especially suitable for high speed data transmission
idl逐点极小值
- 利用idl语言实现遥感图像逐点极小值的求取。
SDRAM_Test
- SDRAM Verilog HDL 测试代码，含有时序约束。-SDRAM Verilog HDL test code contains timing constraints.