资源列表
4
- 进阶实验_04_LCD1602显示 ：在LCD1602上显示RedCore网址-Advanced experiments _04_LCD1602: Display RedCore site on LCD1602
FPGA_Project_Files
- 此例为FPGA发送数据包到pci9054，用到fifo模块，还有sram模块，比较复杂。应用在pci9054与fpga通讯-This example sends the packet to the FPGA pci9054, use fifo module, as well as sram module, is more complex. Application pci9054 communication with fpga
5
- 进阶实验_06_VGA ：通过VGA显示一个汉字，800X600@72Hz-Advanced experiments _06_VGA: Show a character through VGA, 800X600 @ 72Hz
VGA_SW_Verilog
- VGA IP硬核设计，通过开关简单控制输出图像，在ISE14.6验证通过。-VGA IP hard-core design, the output image by a simple control switch, ISE14.6 validation.
Xgpio_Leds_Verilog
- 利用Xgpio实现外设数据交互，本例利用Xgpio控制开关和灯。-Peripheral use Xgpio achieve data exchange, in this case the use of Xgpio control switches and lights.
exp5
- 使用状态机实现流水灯流动,可以通过这个例子学习状态机的使用，但如果以此作为流水灯的控制方法则有待商榷。-use state machine realise leds that flow.
bj7
- 7人表决器，当参与表决的7人中有4人或4人以上赞同时,表决器输出“1” 表示通过,否则输出“0”表示不通过-7 people voting, when seven people have participated in the vote of four or more people agree, the division outputs " 1" through, otherwise outputs " 0" means not through
VGA
- 基于FPGA的VGA彩条及图像显示 含有mif文件-VGA color bar and image display based on FPGA
I2C
- I2C总线控制器的VHDL代码、ISE工程文件、ModelSim仿真环境等-I2C bus controller VHDL code, ISE project file, ModelSim simulation environment
VHDL
- VHDL简介，用最短的时间最直白的表达，明确解释了什么是VHDL语言，适合入门进阶-Introduction to VHDL, with the shortest time the most straightforward expression, clearly explains what VHDL language, suitable for entry-Advanced
VmodCAM_Ref_VGA_Split
- FPGA实现摄像头控制,VHDL语言,HDMI模块-FPGA implementation camera control, VHDL language, HDMI module
IDT7005
- 双端口静态RAM的VHDL程序，具体芯片型号为IDT7005-DUAL-PORT STATIC RAM