资源列表
A8259
- Altera Quartus Megacore of A8259 (IRQ Controller). Published by Altera for free after the IP Megacore portfolio has changed.
IIC
- verilog编写，京微雅格出品IIC 控制器-IIC controller，writed by YiJingjing
all-pole_filters_latest.tar
- All polar vector and its vhdl code with testbench
nios2PtfcardPvga
- 使用nios的io管脚模拟spi时序对tf卡进行数据读写，同时附带一个简单的用verilog写的在vga显示器上刷屏的代码-Use the io pin of nios to simulate the timing of spi to read&write date from&to tf card, and comes with a simple code written by verilog to refresh the vga monitor.
source
- IO转UART的数据收发控制和收发数据代码，中文注视，能够清楚了解代码含义-IO UART data transceiver control and send and receive data code, Chinese gaze, knowing code meaning
adc_test
- verilog AD采样源代码，包括test代码-verilog AD
Sawtooth_Wave
- verilog写的锯齿波程序，基于DDS原路的。内含testbench仿真文件。功能十分强大-verilog write sawtooth program, based on the same route of DDS. Embedded testbench simulation files. Is very powerful
gwnseq
- verilog产生高斯白噪声，gwn_en信号产生使能，gdata是幅度服从高斯分布，功率谱密度为定值的高斯白噪声序列，共10位（现实中只能够做到带限，跟dac输出带宽有关，我的系统只能做到300kHz）-verilog Gaussian white noise, gwn_en signal enabled, gdata amplitude Gaussian distribution, power spectral density of white Gaussian noise sequence
jiaotong
- 已经测试完美的交通灯控制器...状态机实现的，对于初学者应该有用的-The traffic light controller has perfect testing,State machine implementation.It should be useful for beginners.
FPGA_Edge-Decetion
- 基于FPGA的图像边缘检测器的研究与设计，采用EDA技术。-Research and Design of FPGA-based image edge detector, using EDA technology.
FPGA_VGA
- 采用FPGA技术，使用少量资源，实现VGA各个控制信号。-Using FPGA technology, the use of a small amount of resources to achieve VGA various control signals.
SOC_FPGA
- 在图像压缩SOC系统中采用FPGA技术，实现数据传输和处理。- In image compression using FPGA technology SOC systems, data transmission and processing.