资源列表
Verilog.rar
- 《设计与验证VerilogHDL》源码实例 和 Verilog规范,not～
FPGA-LCD12864v.rar
- FPGA驱动LCD12864显示，可显示图形和文字，显示内容可根据实际情况而定,FPGA-driven LCD12864 show that can display graphics and text, display content can be determined according to the actual situation
div(FLP).rar
- 是Nios II處理器下客製化指令的一個32位元浮點數除法器，可將兩IEEE 754格式的值進行相除,Nios II processors are customized instruction under a 32-bit floating-point divider can be two format IEEE 754 value division
pwm_avalon_interface.rar
- 这是一个完整的pwm ip 核，可在sopc中实例化该核，下载即可用，绝对好使。,This is a complete nuclear pwm ip can be instantiated in SOPC in the nuclear, you can download, and absolutely so.
vhd-util-code.rar
- xen source 推出最新的VHD操作工具VHD-UTIL 实现源码,超强，学习高手的设计思路,source code about VHD-UTIL
rtl8029source.rar
- 8 位单片机与以太网控制器 RTL8029 接口的VHDL 设计,8-bit Microcontroller with Ethernet Controller RTL8029 Interface VHDL design
qiangdaqi.rar
- 用verilog编写的抢答器，当主持人宣布“开始比赛”，系统初始化，选手进入“抢答状态”。当某一选手首先按下抢答开关时，相应的指示灯亮，此时抢答器不再接受其他输入信号。电路具有累计分控制（分别用４个４位选手的积分——十六进制数），由主持人控制“加分”。“加分”加分完毕，开始下一轮抢答。电路还可以设有回答问题时间控制。 ,Answer using Verilog prepared, and when the host announced the " start game" , t
FIFO_EMIF.rar
- 实现FPGA通过EMIF总线给DSP定期发送数据的功能,FPGA implementation through the EMIF bus regularly send data to the DSP function
hanshuxinhaogai.rar
- 用FPGA做的DDS函数信号发生器，希望大家喜欢,FPGA to do with the DDS Function Generator, I hope everyone likes
CIC_deci4.rar
- cic抽取滤波器ip核，用于射频采样数字下变频模块的核心数字信号处理部分.此ip核已经过ise10.2验证,CIC decimation by 4 filter，used in Direct RF sampling of GPS signal. the core dsp block in a frondend design
USB2.0IP.rar
- 完整的用VERILOG语言开发的USB2.0 IP核源代码,包括文档,Complete Verilog language developed by USB2.0 IP core source code, including documentation
vhdlLIZI.rar
- 这是几个很有用的VHDL例子,很不错,大学好好看,一定能学会VHDL,This is some very useful examples of VHDL, it is true that the University look good, we can learn VHDL