资源列表
Digital----design
- vhdl三层电梯设计及Quartus_II仿真实验-Digital electric technology course design- elevator automatic control system
ledtest
- FPGA（xcs250E-VQ100）.用于简单的测试LED程序-FPGA (xcs250E-VQ100). For simple test LED program
verilog
- 八路彩灯控制系统，彩灯可以实现，从左到右顺次亮，全亮后逆次序渐灭。（2）从中间到两边对称地渐亮，全亮后仍由中间向两边逐次渐灭。（3）8路灯分两半，从左至右顺次渐亮，全亮后则全灭。-Eight lanterns control system, the lantern can be achieved, from left to right sequence bright, full brightness gradually eliminate the inverse order. (2) fade
counter
- 十六位加减可控制器 以十六进制为基础的加减法运算 -16-bit addition and subtraction controller based on the hexadecimal subtraction
sinw
- 用verilog写的正弦波发生器，QuartusⅡ环境-Sine wave generator written in Verilog
verilog_rtl
- EXPLANATION FOR SERIAL COMMUNICATION
ADC
- AVR单片机的ADC转换功能，详细注释，适用于初学者-AVR microcontroller ADC conversion function, detailed notes for beginners
fredivn
- 分频器的VHDL代码和仿真用的代码 基于ISE开发 可以再板子上实现-Divider VHDL code and simulation code on the ISE development board
uart
- verilog VHDL实现的DE2 uart-Verilog VHDL the uart of the DE2
dianzibiao
- 电子表的设计包括正常计时模块，LED显示模块，定时报警模块，校时模块，秒表模块-module clock(clk,rst,clock_en,second,minute,hour) input clk,rst,clock_en output[5:0]second,minute,hour reg[5:0]second,minute,hour
Attachments_2012_06_19
- verilog basic materials-verilog basic materials
FPGA-development--and-VHDL--based
- FPGA开发流程简介与Verilog HDL语言基础-FPGA development process and VHDL language based