资源列表
8.8_FPGA
- 关于简略通用异步收发器设计描述，有些细节描述或许不太清楚-Described briefly Universal Asynchronous Receiver Transmitter design, some detail may be less clear
QuartusII
- QuartusII 相当全的文件，不能错过哦。-QuartusII users must save it!
4BITMULT
- 基于FPGA的四位乘法器，在QuartusII上编译通过可实现，采用VHDL语言编写。-Based on FPGA four on time-multiplier, in QuartusII compiled can be realized through, the VHDL language.
CODER
- 基于FPGA的8线-3线优先编码器的设计，QuartusII编译通过，采用VHDL语言编写。-Based on FPGA eight line-3 line is preferred encoder design, QuartusII compile, USES the VHDL language.
DECODER7
- 基于FPGA的BCD/七段译码器的设计，QuartusII编译通过，采用VHDL语言编写。-Based on FPGA BCD/these seven decoder design, QuartusII compile, USES the VHDL language.
adder
- 基于FPGA的加法器的设计，QuartusII编译通过，采用VHDL语言编写。-The adder on FPGA design, QuartusII compile, USES the VHDL language.
COUNT10
- 基于FPGA的一个带有异步复位和同步时钟使能的十进制加法计数器的设计，QuartusII编译通过，采用VHDL语言编写。-Based on FPGA with a reduction of asynchronous and synchronous clock can make the decimal additions counter design, QuartusII compile, USES the VHDL language.
SHIFT8
- 基于FPGA的串行输入并行输出寄存器的设计，QuartusII编译通过，采用VHDL语言编写。-Based on FPGA serial input parallel output the design of the register, QuartusII compile, USES the VHDL language.
seven_seg
- 矩阵式键盘驱动程序，能在一个数码管上面显示键盘上按下的数字。-Matrix keyboard driver, can be displayed in a digital pipe above the digital press on the keyboard.
switch
- NETFPGA方面关于参考路由和参考交换机方面的代码，详细的描述了交换机实现的过程。-NETFPGA reference route and reference switches in the code, a detailed descr iption of the implementation process of the switch.
111
- 介绍了三种在硬件或者FPGA上实现高斯序列的方法，速度高，精度高，实现过程简单。-Gaussian sequence of three on the hardware or FPGA, high speed, high accuracy and simple implementation process.
cpld-EEPROM
- 这是一个用cpld清除eeprom的程序，用的是VHDL语言写的-This is a cpld clear eeprom program is to write VHDL