资源列表
zongxian
- 总线的一个例子，有源代码的，希望给大家带来帮助-Bus, an example of source code, and I hope to give us some help
digtal_clock
- 基于fpga的数字钟, quartus II 环境-digtal clock implement on fpga
8051core-Verilog
- 一个Verilog写的8051 MCU实现
multi_bank_OLD
- A expensive MultiBank Algorithm for DVB Deinterleaving
cntr-all
- VHDL code for 3 bit counter
music
- 实现EDA硬件音乐播放，分别编写模块，代码简单易懂，适合初学者-EDA hardware music players, namely the preparation of modules, easy-to-understand code, suitable for beginners
jc2_vhd
- jhonson counter using shifter
decoder3_to_8
- max-plus2 编写的3-8译码器
Verilog
- 现代逻辑设计 Verilog 语言
shukongdianyabiao
- 使用51单片机以及键盘液晶作为人机互动，输入你想输入的电压值，端口就输出相应的二进制数-51 MCU and LCD using the keyboard as a human-computer interaction, input you want to input voltage value, the port on the output of the corresponding binary number
sessionspage.asp_files
- LCD program for fpga projects
8051Verilog
- 利用FPGA可编程的特点，在内部编写了一个8051单片机软核。已通过调试。-The use of FPGA programmable features, in-house preparation of a 8051 soft-core. Passed debugging.