资源列表
VHDLCPU
- 实现简单的8位CPU，包含一些简单的指令，逻辑运算和算术运算-CPU
DEMO5_VGA_img
- VGA 显示 彩条显示 VHDL FPGA-VGA color display shows VHDL FPGA
DDR_Xilinx
- xilinx公司DDR控制ipxilinx公司DDR控制ip-xilinx公司DDR控制ip
C6678-FPGA-source-(very-good)
- TI公司8核DSP C6678开发板fpga源码，很好。-TI DSP C6678 fpga code
maxii_ps2_restored
- 已经实现的PS2键盘扫描``用verilog描述··· 已经实现的PS2键盘扫描``用verilog描述-PS2 keyboard scan has been achieved `` has been achieved with the verilog descr iption of `` PS2 keyboard scan described with verilog
FRENQ
- 4位十进制频率计的设计，通过采用1Hz时钟对待测时钟进行频率测定-4 decimal frequency of the design, through the use of 1Hz clock to treat the measured clock frequency measurement
voicetongxindianlu
- 语音通信电路完整的程序设计。里面是所有的源文件都经本人测试可以用，放心下载吧-Voice communications circuit design procedures. Inside are all the source files have been tested, I can use, rest assured that you download
PLL_12MHz
- 用verilog语言制作一个PLL，这个PLL可以将频率除频到12MHZ，将PLL除频成12MHZ输出-Verilog language production with a PLL, the PLL frequency divider can be to 12MHZ, 12MHZ into the PLL output divider
msp430_jtag_nios
- 将msp430与使用nios的fpga相连，将fpga作为msp430的jtag使用。其中用到了nios内的多种接口以及dma操作
10jinzhijishuqi
- 基于fpga的十进制计数器，开发环境为maxpius-Decimal counter fpga-based development environment for maxpius
FPGA--VGA-
- 这是FPGA控制VGA的一篇文章，包括原理及心得，代码也是用Verilog写的。-This is the FPGA to control VGA article, including the theory and experience, the code is using Verilog.
b
- 递归下降分析器的设计 首先将文法改写成EBNF形式，根据递归下降分析法基本思想编写程序。 -The design of recursive descent parser rewrite first EBNF grammar forms, according to the basic idea recursive descent analysis programming.