资源列表
crc_tool
- 用c编写的自动生成并行crc处理的verilog代码的工具-Automatically generate the verilog code to parallel crc processing tools written with c
BotelloProyecto
- Unipolar Stepper Motor Driver in VHDL, with CCW,Step-number,Half/Complete Steps and Velocity selector
fft1604
- msp430程序开发FFT代码！对板子上所有的模块开发适合应用-msp430 program development code! On board the module development suitable for all! !
anjian-shumaguan-liushuideng
- verilog HDL语言，功能：按键控制，数码管显示多个状态，同时显示动态流水灯-failed to translate
VerilogCodingStyle
- This document describes coding styles and guidelines for writing Verilog code for ASIC blocks and test benches.
M31serial
- 码长为31的M序列产生器，实现码长为31的M序列发生器的功能-Code length of 31 M-sequence generator, the code length of 31 in the M-sequence generator function
UART-communication
- 串口多机通信，是两个8051做的，外加PROTEUS仿真-Serial multi-machine communication, 8051 to do two, plus PROTEUS simulation
kMMyycousee
- keilc51写的，双色LLED点阵屏 可移动 速度可调 -keilc51 write, color LLED lattice screen removable adjustable speed
source
- 包含了verilog hdl实验的很多源代码\(^o^)/~-Contains a verilog hdl a lot of experimental code \ (^ o ^)/~
myproject
- 四位全加器，VHDL语言，max+plusII平台做的
KX_DVP3F_SCH
- 康芯FPGA开发竞赛板kx-dvp3f的电路图-Kangxin FPGA development board kx-dvp3f circuit race
huberth_Project_Proposal
- verilog code that is gud for beginners project helps.