资源列表
clock_timer
- 时钟，计时器，23小时59分59秒的时钟，可自动进位计时，Verilog编写-Clock, timer, 23 hours, 59 minutes, 59 seconds of clock, automatic binary timing, Verilog prepared
ripple
- This a ripple adder circuit-This is a ripple adder circuit
EXA02
- 一个关于VHDL的cpld开发实验程序，通过运用max+plus 运行程序，实现实验相关功能-VHDL CPLD on the development of experimental procedures, through the use of max+ plus run the program, the experimental implementation-related features
yinyue
- 音乐，用vhdl编写的程序-Music, using VHDL preparation procedures
kcpsm3
- picoblaze xilinx的8位处理器核和他的编译器。能嵌放到FGPA中
TMS470_P256_UART
- TMS470P256 programme C-TMS470P256 programme C
LCD12864
- 使用12864点阵式液晶进行各种显示，本程序中的12864液晶，为全部自定义，比较灵活！-12864 using a variety of dot-matrix LCD display, this program 12864 for all custom, more flexible!
counter999
- 采用quartus软件的verilog编程语言编写的计数器模块-Counter module
Mentekaluo
- 本程序和文件主要利用蒙特拉罗的思想来完成圆周率的计算，利用事物发生的概率来逼近真实情况。-The programs and files using mainly Mengtelaluo thought to complete the calculation of pi, using the probability of things have to approximate the actual situation.
I2C--1602
- I2C总线上接两个24C04的1602液晶显示-I2C bus on the next two 24C04' s 1602 LCD
usb_cy7c68013_connect_to_PC_Source_Code
- usb_cy7c68013与PC通信源码-usb cy7c68013 connect toPC-- Source Code
FPGA
- 一种新型FPGA器件延时计算方法,讲解详实-A new FPGA device delay calculation method, explain the details