资源列表
DDC
- 文介绍了数字下变频的组成结构，并通过一个具体的实例，给出了FPGA实现的具体过程。-Paper describes the digital down conversion of the structure, and through a specific example, given the specific FPGA implementation process.
KD_CPU_src
- verilog语言写的8位CPU源代码，基本的算术运算和逻辑运算，对于学习计算机原理和verilog语言都有良好的效果-Verilog Language Writing 8-bit CPU source code, the basic arithmetic operations and logic operations, the study of computer principles and Verilog language has good results
ex1_LCD501_Character
- 用凌阳61实现lcd显示，在lcd上显示“sunplus”，“technology”，“easy living”，这三个字符分三行显示-Achieved with the Sunplus 61 lcd display, the lcd display " sunplus" , " technology" , " easy living" , these three characters in three lines show sub-
Lab20
- the booth algorithm to implement the 32bits multiplication.-the booth algorithm to implement the 32bit 's multiplication.
askcodec
- 利用EDA开发平台，设计ASK编码与解码功能-Using EDA development platform, design coding and decoding ASK
mcnc
- 好不容易才从国外网站上下下来的哦，希望大家多多支持……！-eyebrows from overseas sites from the next, oh, I hope Members can support ...!
lab8
- matlab实现国歌播放实验,实验8，音乐播放器-matlab achieve national anthem playing experiment 8, music player
work1ADD8
- 组合电路的设计8位加法器设计(ADD8.vhd)
usb_xilinx_vhdl
- usb源码_xilinx_vhdl 这是Xilinx FPGA上的usb源码（VHDL)
mid-filter
- mid-filter 中值滤波算法的原理及核心代码 word版-mid-filter median filter and the core principles of the code word version
baseball
- 用VHDL开发的棒球游戏，可以在QuartusII环境下编译，适用于各种FPGA开发板。-VHDL development of the baseball game, in QuartusII environment compiler, apply to all FPGA development board.
jiaotongdeng
- 使用vhdl语言设计交通信号灯。由一条主干道和一条支干道汇合成十字路口，在每个入口处设置红、绿、黄三色信号灯，红灯亮禁止通行，绿灯亮允许通行，黄灯亮则给行驶中的车辆有时间停在禁行线外。主干道处于常允许通行的状态，支干道有车来时才允许通行，主、支干道均有车时，两者交替允许通行，主、支干道每次放行时间不得短于30S，在每次由绿灯亮到红灯亮的转换过程中，要亮4S黄灯作为过渡。 -Using vhdl language design traffic lights. By a main road a