资源列表
textphase
- 恒精度测频，高精度测相VHDL程序，简明易懂，自己好好学啊-Constant frequency measurement accuracy, high-precision measurement of VHDL procedures, easy to understand, their own school ah well
eTOM_Poster_8
- BUSINESS PROCESS FRAMEWORK (eTOM) RELEASE 8
CLOCK
- 数字时钟的实现，能够显示时间，包括时，分，秒的信息。-The realization of the digital clock that can display time, including hours, minutes and seconds of information.
vhdl
- vhdl 常见电路设计代码，组合逻辑，时序电路设计，状态机设计 -vhdl
fifo
- 模拟页式虚拟存储管理中硬件的地址转换和用先进先出调度算法处理缺页中断.虽然是文档文件，其源代码可以直接拷贝至C++运行，并且文档最后给出相应执行结果。-Simulation of the hardware address translation page of virtual storage management and FIFO scheduling algorithm for processing a page fault, although it is a document file an
key-lcd
- 键盘 led 控制 按一个键 对应点的led灯亮-key
Src
- RS232的接口代码，大家学习一下，=比较实用-RS232 interface code, we learn about, = more practical
rtl
- 通过FPGA对pll进行控制，改变PLL 的输出频率。接口为spi接口。-Pll controlled by FPGA on changing PLL Output frequency. Interface spi interface.
ADC0809-
- 基于C51单片机的ADC0809模数转换与显示-C51-based single-chip ADC0809 analog-digital conversion and display
verilog-codes
- hi this an verilog codes-hi this is an verilog codes
ref2
- 这是一个PS2的Verilog代码，我买的一个开发板里面带的，-This is the Verilog code for a PS2, I bought a development board inside the zone,
usb
- USB的verilog IP模块，经过DesignCompiler综合验证-USB-verilog IP module, comprehensive verification through DesignCompiler