资源列表
key_music
- fpga的程序，大家看一下 ，是按键电子琴的小程序，有兴趣的下载看看啊-fpga program, we look at, is the key organ of small programs, are interested in downloading to see ah
EBCode21
- 功能很强大！！！希望大叫多多指教，共同进步，一块发展-Function is very powerful! ! ! Hope that the exhibitions shouting and common progress, a development
PIC_C
- pic单片机实用c程序，ad can rs323 pwm wdt十三个程序文档-pic microcontroller practical c programming, ad can rs323 pwm wdt thirteen program documentation
VHDL-Project
- Design of a Moore Synchronous Sequential Machine that operates according to the following two sequences.
CCIR656-encoder
- a source code of CCIR656 encoder in verilog HDL with corresponding testbench and a snapchat of the resulting waveform-a source code of CCIR656 encoder in verilog HDL with corresponding testbench and a snapchat of the resulting waveform
1324135132324
- FPGA嵌入式编程，利用状态机实现AD转换功能，内附程序-FPGA embedded programming, using the state machine to achieve AD conversion function, enclosing the process
avr_core_latest.tar
- AVR Core Version 8 (Free). JTAG Programmer is fully compatible with one used in the Atmega128. So you may use Atmel s JTAG ICE to write/read "flash"(program memory) or "EEPROM". Free version of the core doesn t include JTAG OCD module.-AVR Core Ver
FPGA_AD
- 基于Altera的FPGA开发的基于FPGA的AD转换功能，完全通过验证。-Altera s FPGA-based development of FPGA-based AD conversion function, fully validated.
2ASK
- 使用altera的FPGA实现2ASK的调制与解调，内含详细注释与完整工程-FPGA implementation using Altera modulation and demodulation of 2ASK, containing detailed notes and complete project
Demultiplexing-200-MHz-Data-Streams
- Modern serial data protocols (e.g., FireWire, SONET, ATM, T4) sometimes require clocks that are faster than maximum FPGA global clock speeds. To solve this problem, the incoming clock (200 MHz in the example below) can be used to demultiple
fenwei
- 一个分位器，将一个两位数分位两个个位数，方便于分位显示-divided a double digit into two unit
clkdivverilog
- 使用verilog 计数50次 实现50分频，以此类推，分频器-clkdiv using verilog，