资源列表
A-Verilog-HDL-Test-Bench-Primer
- verilog testbench 编写入门，轻松教会编写测试代码-shell interpreter tutorial information, content, round and rich, from the basics
AVerilogHDLTestBenchPrimer
- VHDL的验证练习题，对于新手是很好的练习机会-VHDL validation exercises for the novice is a good practice opportunity
FPGA_AD7822
- 基于FPGA的AD转换控制器设计，AD7822，quartus II，verilog hdl-A Design of the A/D Convertion Control Module Based on FPGA
qicheweideng
- 汽车尾灯控制电路 左右各3个指示灯。向一侧转弯时，指示灯循环点亮。刹车时，指示灯全亮-Car tail lights control circuit around the three indicators. Turn to the side, the indicator light cycle. Brakes, lights all light
ddr
- 关于ddr sdram的一篇不错的文章，讲得挺详细的。-a good paper about ddr sdram，teaching you how to use ddr sdram.
S7_PS2_RS232
- 本实验实现PS/2接口与RS-232接口的数据传输， PS/2键盘上按下按键，可以通过RS-232自动传送到主机的串口调试终端上（sscom32.exe）； 并在数据接收区显示接收到的字符。 串口调试终端的设置：波特率115200，一个停止位，无校验位。 -The experimental realization of PS/2 interface and RS-232 data interface, PS/2 keyboard, press the button, you ca
Codes
- USB 2.0 using VHDL with files : main.c, drice.c and HIGH_SPEED_USB_CORE_SETUP_TRANSACTION
verilog_decimal_BCD
- 用verilog写的十进制转BCD码,希望对大家有帮助-Verilog to write with decimal switch BCD, we hope to help
MotorRecorder
- 汽车行驶状态记录仪,使用单片机和CPLD开发，稍加修改即可用于实践，具有很高的工程指导价值和现实推广前景-State car logger, use the MCU and CPLD development, a little modification can be used in practice, a high value engineering and practical guidance to promote the prospects of
dec3_8
- 有VHDL写的一个38译码器,并付仿真波形.-VHDL has written a decoder 38, and pay the simulation waveform.
430-rs485
- msp430的rs485多机通信程序，独立按键使用状态机扫描-the msp430 rs485 multi-machine communication program, independent keys using the state machine scans
BCD
- BCD数码管显示 在DE2平台上运行 quartus-BCD digital display in the DE2 platform quartus