资源列表
MIPS_final-version
- 以Verilog所撰寫的Booth’s Algorithm Multiplier，可加到NiosII CPU之上，完成一道NiosII CPU的新指令。-Written by Verilog Booth,' s Algorithm Multiplier can be added to the above NiosII CPU to complete a the Nios II CPU command.
pipeline
- 以Verilog撰寫而成的Booth’s Algorithm Multiplier，並以Pipeline方式實現。-Written in the Verilog Booth' s Algorithm Multiplier, and the Pipeline way.
VHDL
- 本程序是些用VHDL应用的一些基本程序，有分频器，编译码器等一些基本器件程序-This program is using VHDL applications, some of the basic program, a divider, codecs, etc. some of the basic device program
QuartusIIb-warning
- 本文是分析一些在VHDL的编程中碰到的一些问题的解决-This article is the analysis of some of some of the problems encountered in VHDL programming to solve
FFT_64
- 自己写的一个64点的FFT，在ISE上测试并做了仿真。-They write a 64-point FFT, the ISE test and do the simulation.
1602
- 关于LCD1602的谁用说明，说的比较详细，希望对你有帮助-On LCD1602 who use the instructions that detail, you want to help
address_gen
- 基于FPGA使用Verilog语言构成的DDS信号发生器-DDS signal generator based on FPGA using Verilog language constitutes
the-Application-of-FPGAs-for-network
- Summerville写的FPGA在大型网络设备中的具体应用-Summerville write the FPGA in the large network equipment
ds1302
- ds1302的液晶显示程序，cpu 采用的是89c51单片机，显示效果很好-this code is for ds1302 written by C language
11034635826747
- 制作示波器的资料，是是基于FPJA的，在其他地方找的资料-Production of the oscilloscope, is based on the FPJA, in other places to find information
USART
- uart with arm32f103v6
multiprocessor_test
- 基于FPGA的双核处理器实验，相关资料和文档说明-FPGA-based dual-core processor experiments, the relevant information and documentation