资源列表
3
- 这是一个3为计数器的实验程序图，给大家参考一下-This is a 3 counter diagram of the experimental procedures, for your reference
altera
- 这是一个加法器的实验程序图，有不足之处请指正-This is an adder diagram of the experimental program, please correct the inadequacies
Snack
- 用Verilog HDL实现贪吃蛇游戏。Ps2键盘输入，在电脑显示屏输出。-Snake game using Verilog HDL. The Ps2 keyboard input on the computer screen output.
pingpang
- 用Verilog HDL实现乒乓球游戏，用PS2键盘输入，电脑显示器输出。-Table tennis game with Verilog HDL, PS2 keyboard input, the computer monitor output.
No.2DDS
- 用Verilog HDL实现DDS信号发生器。-DDS signal generator using Verilog HDL.
No.3bujingdianji
- 用Verilog HDL实现步进电机的控制。能智能控制转速。-Stepper motor control using Verilog HDL. Can the intelligent control speed.
ADCcaiyang
- 用Verilog HDL实现ADC采样。-Stepper motor control using Verilog HDL. Can the intelligent control speed.
r
- 统计8位矢量中‘1’的个数（分别用变量和信号两种方法实现）-Statistics of 8 bits of the number of 1 in the vector
EDA
- EDA课件中的状态机的学习资料，是PDF格式-The EDA in state machine learning materials, PDF format
Support-TP-CCIN-2012-2013
- VHDL编辑PGCD的文件。实际上，这是上课时候老师给的。求通过验证-VHDL edit file of PGCD. In fact, this is the teacher gave during the class. Requirements through validation.
Dos_Pro---8.18
- 简易数字示波器，从AD接受双通道数据，存入内部fifo，并通过串口传至单片机实现波形显示-Simple digital oscilloscope, from AD to accept dual-channel data stored in the internal fifo waveform display and transmitted to the microcontroller through the serial port
uart_Rx
- 在Xilinx的SP605开发板上实现了FPGA接收数据的串口通讯，接收数据是Led会亮，没有接收数据的时候灯是灭的。-Xilinx SP605 development board FPGA receives serial data communication receive data Led lights not receive data when the lights are off.