资源列表
7.1_ImageSmooth
- 基于SystemGenerator的图像平滑处理工程,成功在XilinxFPGA上验证。-The image smoothing based on SystemGenerator the treatment works successfully on the XilinxFPGA verification.
7.2_MidFilter
- 基于SystemGenerator的图像中值滤波工程,成功在XilinxFPGA上验证。-Based on SystemGenerator the image median filtering works successfully on the XilinxFPGA verification.
7.3_ImageSharp
- 基于SystemGenerator的图像锐化工程,成功在XilinxFPGA上实现。-The image sharpening works based SystemGenerator success on the XilinxFPGA.
ImageEdgeDetec
- 基于SystemGenerator的图像边缘检测,分别有三种检测模式Sobel,Laplace以及Gauss—Laplace算子方式。成功在XilinxFPGA上验证,附带网表。-Three detection modes Sobel, Laplace and Gauss-Laplace operator image edge detection based on SystemGenerator. Success in XilinxFPGA verify with netlist.
ImageDivision
- 基于SystemGenerator的图像分割,成功在XilinxFPGA上验证,附带网表。-Based on the image segmentation SystemGenerator, success on the XilinxFPGA verified with the netlist.
NCO_Test
- 代码是对通信中的NCO模块的仿真,基于QUARTUSII9.0软件,代码编译成功,并且功能仿真已经实现-Code NCO module communication the simulation, based QUARTUSII9.0 software, code compiled successfully, and the functional simulation has been achieved
yuyin_jiami
- 基于quarusII仿真软件,进行模块化设计,设计达到的目的是对进来的语音信号进行加密处理-Based on quarusII simulation software, modular design, designed to meet the incoming voice signal is encrypted
sin_10k
- 基于FPGA的利用rom进行查询的方式生成一个频率为10KHZ的sin信号,编译成功,并实现功能仿真。-Query based on the the FPGA use of rom generate a frequency of 10 kHz sin signal, compiled successfully and to achieve functional simulation.
fir
- 基于FPGA的低通滤波器的设计,仿真环境是QuartusII9.0。对信号进行低通滤波,编程成功。希望对大家有所帮助-FPGA-based low-pass filter design, the simulation environment QuartusII9.0. The signal is low-pass filtering, the programming was successful. We hope to help
decoder3_8
- 燕山大学VHDL课程设计,3-8译码器简单代码。-Yanshan University VHDL curriculum design, 3-8 decoder simple code.
jiaotongden
- 燕山大学通信工程VHDL课程设计,简易交通灯编程代码。-Communication Engineering, Yanshan University VHDL curriculum design, simple traffic light programming code.
step-machine
- fpga课程设计中的步进电机简易编程代码,VHDL语言。-FPGA curriculum design stepper motor simple programming code, VHDL language.
